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Searched refs:__ASM_STR (Results 1 – 3 of 3) sorted by relevance

/arch/riscv/include/asm/
A Dasm.h10 #define __ASM_STR(x) x macro
12 #define __ASM_STR(x) #x macro
16 #define __REG_SEL(a, b) __ASM_STR(a)
18 #define __REG_SEL(a, b) __ASM_STR(b)
57 #define RISCV_INT __ASM_STR(.word)
58 #define RISCV_SZINT __ASM_STR(4)
59 #define RISCV_LGINT __ASM_STR(2)
65 #define RISCV_SHORT __ASM_STR(.half)
66 #define RISCV_SZSHORT __ASM_STR(2)
67 #define RISCV_LGSHORT __ASM_STR(1)
A Dinsn-def.h170 #define RV_OPCODE(v) __ASM_STR(v)
171 #define RV_FUNC3(v) __ASM_STR(v)
172 #define RV_FUNC7(v) __ASM_STR(v)
173 #define RV_SIMM12(v) __ASM_STR(v)
174 #define RV_RD(v) __ASM_STR(v)
175 #define RV_RS1(v) __ASM_STR(v)
176 #define RV_RS2(v) __ASM_STR(v)
177 #define __RV_REG(v) __ASM_STR(x ## v)
208 __ASM_STR(.error "hlv.d requires 64-bit support")
A Dcsr.h521 __asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\
530 __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \
539 __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \
547 __asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\
556 __asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0" \
564 __asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\
573 __asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0" \

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