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Searched refs:__cacheline_aligned (Results 1 – 10 of 10) sorted by relevance

/arch/hexagon/include/asm/
A Dcache.h17 #define __cacheline_aligned __aligned(L1_CACHE_BYTES) macro
/arch/nios2/include/asm/
A Dcache.h23 #define __cacheline_aligned macro
/arch/arm64/include/asm/
A Dsetup.h14 extern u64 __cacheline_aligned boot_args[4];
/arch/powerpc/platforms/pseries/
A Dio_event_irq.c62 static char ioei_rtas_buf[RTAS_DATA_BUF_SIZE] __cacheline_aligned;
/arch/arm64/kernel/
A Dsetup.c88 u64 __cacheline_aligned boot_args[4];
/arch/xtensa/kernel/
A Dsmp.c189 unsigned long cpu_start_id __cacheline_aligned; variable
/arch/alpha/kernel/
A Dsmp.c61 } ipi_data[NR_CPUS] __cacheline_aligned;
A Dsmc37c669.c1095 static __cacheline_aligned DEFINE_SPINLOCK(smc_lock);
/arch/sparc/kernel/
A Dtime_64.c196 static struct sparc64_tick_ops tick_operations __cacheline_aligned = { variable
/arch/x86/kernel/
A Dhpet.c784 static union hpet_lock hpet __cacheline_aligned = { variable

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