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/arch/m68k/coldfire/
A Dhead.S71 clrl %d0
76 moveql #1, %d0
157 movec %d0,%CACR
186 addl %a7,%d0
197 movec %d0,%ACR0
199 movec %d0,%ACR1
202 movec %d0,%ACR2
204 movec %d0,%ACR3
207 movec %d0,%CACR
217 movel %d0,MMUOR
[all …]
/arch/m68k/math-emu/
A Dfp_cond.S63 swap %d0
68 swap %d0
70 tst.l %d0
80 add.w %d0,%a1
88 subq.w #1,%d0
177 btst #4,%d0
195 moveq #0,%d0
199 moveq #0,%d0
206 moveq #0,%d0
228 moveq #0,%d0
[all …]
A Dfp_entry.S50 GET_CURRENT(%d0)
73 tst.l %d0
140 move.l %d3,%d0
145 move.l %d4,%d0
150 move.l %d5,%d0
155 move.l %d6,%d0
160 move.l %d7,%d0
191 | move.l %d0,%d3
197 | move.l %d0,%d4
209 move.l %d0,%d6
[all …]
A Dfp_util.S70 2: clr.l %d0
100 tst.l %d0
104 neg.l %d0
130 move.l %d0,%d1
150 tst.l %d0
169 lsl.l #3,%d0
182 lsl.l #8,%d0
183 lsl.l #3,%d0
185 moveq #21,%d0
186 lsr.l %d0,%d1
[all …]
A Dfp_scan.S108 cmp.w #7,%d0
115 clr.l %d0
157 extb.l %d0
161 ext.l %d0
226 addq.w #1,%d0
266 lsr.l #8,%d0
267 lsr.l #7,%d0
268 lsr.w #1,%d0
283 ext.l %d0
293 extb.l %d0
[all …]
A Dfp_move.S50 move.w %d0,%d1
53 clr.l %d0
75 move.w %d0,%d1
98 move.l %d0,%d1
100 move.w %d2,%d0
102 move.b %d1,%d0
110 move.l %d0,%d1
112 move.w %d2,%d0
213 lsl.w #1,%d0
214 lsl.l #7,%d0
[all …]
A Dfp_movem.S134 moveq #12,%d0
138 neg.l %d0
155 add.l %d0,%a0
174 add.l %d0,%a0
207 move.l %d0,%d1
236 sub.w #19,%d0
349 lsr.l #4,%d0
351 and.l %d0,%d1
353 lsr.l #2,%d0
355 and.l %d0,%d1
[all …]
A Dfp_decode.h135 move.b %d2,%d0
136 ext.w %d0
149 move.l %a0,%d0
155 ext.l %d0
164 lsl.l %d1,%d0
233 cmp.w #7,%d0
308 moveq #3,%d0
309 and.w %d2,%d0
350 add.w %d0,%a1
352 add.l %d0,%a1
[all …]
/arch/powerpc/math-emu/
A Dudivmodti4.c20 if (d0 > n1) in _fp_udivmodti4()
33 if (d0 == 0) in _fp_udivmodti4()
34 d0 = 1 / d0; /* Divide intentionally by zero. */ in _fp_udivmodti4()
47 if (d0 > n1) in _fp_udivmodti4()
51 count_leading_zeros (bm, d0); in _fp_udivmodti4()
58 d0 = d0 << bm; in _fp_udivmodti4()
72 if (d0 == 0) in _fp_udivmodti4()
73 d0 = 1 / d0; /* Divide intentionally by zero. */ in _fp_udivmodti4()
86 n1 -= d0; in _fp_udivmodti4()
97 d0 = d0 << bm; in _fp_udivmodti4()
[all …]
/arch/m68k/kernel/
A Drelocate_kernel.S35 bclr #7,%d0
36 pmove %d0,%tc
56 movel %a4,%d0
60 movec %d0,%itt0
61 movec %d0,%dtt0
66 moveq #0,%d0
69 movec %d0,%itt0
89 andw %d2,%d0
96 andw %d2,%d0
104 andw %d2,%d0
[all …]
A Dhead.S716 clrl %d0
782 tstl %d0
812 tstl %d0
826 tstl %d0
856 tstl %d0
862 tstl %d0
1948 putn %d0
2376 dputn %d0
2406 dputn %d0
2427 dputn %d0
[all …]
A Dentry.S113 GET_CURRENT(%d0)
121 GET_CURRENT(%d0)
152 GET_CURRENT(%d0)
184 addql #1,%d0 | optimization for cmpil #-1,%d0
232 lslw #1,%d0
235 lslw #8,%d0
259 lslb #1,%d0
291 GET_CURRENT(%d0)
341 movec %sfc,%d0
346 movec %usp,%d0
[all …]
/arch/m68k/include/asm/
A Dm525xsim.h242 moveb #MCFINTC2_VECBASE,%d0
249 movel %d0,0x84(%a0) /* set CSMR0 */
268 orl #0x1,%d0
277 movel %d0,0x8c(%a0)
279 movel %d0,0x90(%a0)
281 movew %d0,0x96(%a0)
287 movel %d0,0x98(%a0)
289 movel %d0,0x9c(%a0)
291 movew %d0,0xa2(%a0)
294 movel %d0,0x18c(%a1)
[all …]
/arch/x86/lib/
A Dstring_32.c21 int d0, d1, d2; in strcpy() local
36 int d0, d1, d2, d3; in strncpy() local
55 int d0, d1, d2, d3; in strcat() local
72 int d0, d1, d2, d3; in strncat() local
95 int d0, d1; in strcmp() local
119 int d0, d1, d2; in strncmp() local
143 int d0; in strchr() local
154 : "=a" (res), "=&S" (d0) in strchr()
165 int d0; in strlen() local
179 int d0; in memchr() local
[all …]
/arch/m68k/fpsp040/
A Dx_store.S42 bfextu %d0{#6:#3},%d0 |isolate dest. reg from cmdreg3b
45 moveb (%a1,%d0.w),%d0 |convert reg# to dynamic register mask
56 cmpb #0x80,%d0
61 cmpb #0x40,%d0
66 cmpb #0x20,%d0
80 cmpib #3,%d0
83 bfextu %d0{#6:#3},%d0 |extract destination register
108 | d0 -> 0
131 clrl %d0 |clear d0
137 swap %d0 |d0 now in upper word
[all …]
A Dx_operr.S142 cmpl #0x7FFF0000,%d0
164 tstl %d0
178 swap %d0
191 tstl %d0
205 asll #8,%d0
206 swap %d0
263 orl #8,%d0
266 orl #0x10,%d0
278 movel %d1,%d0 |put size in d0
285 | to d0 for write out. If not, it is a real operr, and set d0.
[all …]
A Dsto_res.S40 clrl %d0
41 bsetl %d1,%d0 |d0 is dynamic register mask
42 fmovemx (%a7)+,%d0
45 cmpib #0,%d0
47 cmpib #1,%d0
49 cmpib #2,%d0
73 clrl %d0
74 bsetl %d1,%d0 |d0 is dynamic register mask
78 cmpib #0,%d0
80 cmpib #1,%d0
[all …]
A Dstanh.S87 movel (%a0),%d0
88 movew 4(%a0),%d0
89 movel %d0,X(%a6)
97 movel X(%a6),%d0
98 movel %d0,SGN(%a6)
101 movel %d0,X(%a6)
115 eorl %d0,V(%a6)
132 movel X(%a6),%d0
172 movel X(%a6),%d0
175 fmoves %d0,%fp0
[all …]
A Dstwotox.S201 movel (%a0),%d0
203 fadds %d0,%fp0
211 movel (%a0),%d0
212 movew 4(%a0),%d0
237 movel %d0,%d2
242 movel %d2,%d0
305 movel (%a0),%d0
307 fadds %d0,%fp0
315 movel (%a0),%d0
340 movel %d0,%d2
[all …]
A Dutil.S139 clrl %d0
182 lsll #2,%d0 |move round precision to d0{3:2}
184 orl %d1,%d0 |index is fmt:mode in d0{3:0}
186 movel %a1@(%d0:l:4),%a1 |use d0 as index to the table
359 bfextu %d0{#9:#2},%d0 |move the rounding prec bits to d0{1:0}
417 bfextu %d0{#24:#2},%d0 |move the rounding prec bits to d0{1:0}
430 bfextu %d0{#0:#3},%d0 |shift opclass bits d0{31:29} to d0{2:0}
450 bfextu %d0{#3:#3},%d0 |dest fmt from cmdreg1b{12:10}
512 lsll #2,%d0 |move round precision to d0{3:2}
514 orl %d1,%d0 |index is fmt:mode in d0{3:0}
[all …]
A Dsgetem.S50 bclrl #15,%d0 |clear the sign bit
52 fmovew %d0,%fp0 |move the exp to fp0
59 movew LOCAL_EX(%a0),%d0 |load resulting exponent into d0
61 fmovew %d0,%fp0 |move the exp to fp0
78 movel USER_FPCR(%a6),%d0
82 orw #0x7fff,%d0 |clear old exp
94 movel LOCAL_HI(%a0),%d0 |load ms mant in d0
106 | ms mantissa part in d0
109 | shifted bits in d0 and d1
120 bfffo %d0{#0:#32},%d3 |find first 1 in ls mant to d0
[all …]
A Dround.S131 | only. All registers except d0 are kept intact. d0 becomes an
172 movel %d3,%d0 |return grs to d0
365 movel LOCAL_HI(%a0),%d0 |d0 has ms mant
386 movew LOCAL_EX(%a0),%d0 |d0 has exponent
441 movel %d1,%d0 |copy d1 into d0
454 movel %d1,%d0 |copy d1 into d0
536 subw %d1,%d0 |d0 = 32 - d1
540 bfextu FP_SCR2+LOCAL_LO(%a6){%d0:#32},%d0 |d0 = new G,R,S
553 orl #0x20000000,%d0 |set sticky bit in d0
566 subw %d1,%d0 |d0 = 32 - d1
[all …]
/arch/m68k/68000/
A Dentry.S45 addql #1,%d0
48 movel #-ENOSYS,%d0
80 lsl #2,%d0
128 and #0x3ff, %d0
139 and #0x3ff, %d0
150 and #0x3ff, %d0
161 and #0x3ff, %d0
172 and #0x3ff, %d0
183 and #0x3ff, %d0
194 and #0x3ff, %d0
[all …]
A Dhead.S73 moveq #0, %d0
74 movew %d0, 0xfffff618 /* Watchdog off */
101 moveq #0, %d0
104 subw #1, %d0
132 movel #0x007FFFFF, %d0 /* IMR */
133 movel %d0, 0xfffff304
134 moveb 0xfffff42b, %d0
135 andb #0xe0, %d0
136 moveb %d0, 0xfffff42b
215 addl %d0, %a0 /* copy from end */
[all …]
/arch/m68k/lib/
A Dudivsi3.S67 #define d0 REG (d0) macro
92 movel sp@(8), d0 /* d0 = dividend */
96 movel d0, d2
100 movew d2, d0 /* save high quotient */
101 swap d0
104 movew d2, d0
109 lsrl IMM (1), d0 /* shift dividend */
119 mulu d0, d1 /* low part, 32 bits */
129 L5: subql IMM (1), d0 /* adjust quotient */
140 movel a6@(8),d0
[all …]

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