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Searched refs:read_sysreg (Results 1 – 25 of 50) sorted by relevance

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/arch/arm64/include/asm/
A Darm_pmuv3.h15 return read_sysreg(pmevcntr##n##_el0)
37 return read_sysreg(pmevtyper##n##_el0)
51 u64 dfr0 = read_sysreg(id_aa64dfr0_el1); in read_pmuver()
59 u64 dfr1 = read_sysreg(id_aa64dfr1_el1); in pmuv3_has_icntr()
72 return read_sysreg(pmcr_el0); in read_pmcr()
87 return read_sysreg(pmccntr_el0); in read_pmccntr()
127 return read_sysreg(pmccfiltr_el0); in read_pmccfiltr()
147 return read_sysreg(pmovsclr_el0); in read_pmovsclr()
162 return read_sysreg(pmceid0_el0); in read_pmceid0()
167 return read_sysreg(pmceid1_el0); in read_pmceid1()
A Ddcc.h20 return read_sysreg(mdccsr_el0); in __dcc_getstatus()
25 char c = read_sysreg(dbgdtrrx_el0); in __dcc_getchar()
A Darch_timer.h137 return read_sysreg(cntp_ctl_el0); in arch_timer_reg_read_cp15()
144 return read_sysreg(cntv_ctl_el0); in arch_timer_reg_read_cp15()
156 return read_sysreg(cntfrq_el0); in arch_timer_get_cntfrq()
161 return read_sysreg(cntkctl_el1); in arch_timer_get_cntkctl()
A Ddaifflags.h45 flags = read_sysreg(daif); in local_daif_save_flags()
72 (read_sysreg(daif) & (PSR_I_BIT | PSR_F_BIT)) != (PSR_I_BIT | PSR_F_BIT)); in local_daif_restore()
A Dcpuidle.h19 c->daif_bits = read_sysreg(daif); \
A Dhardirq.h42 ___hcr = read_sysreg(hcr_el2); \
A Dvirt.h123 return read_sysreg(CurrentEL) == CurrentEL_EL2; in is_kernel_in_hyp_mode()
A Defi.h59 ((void)((state_flags) = read_sysreg(daif)))
A Dcache.h128 u64 clidr = read_sysreg(clidr_el1); in read_cpuid_effective_cachetype()
/arch/arm64/kvm/hyp/include/hyp/
A Dsysreg-sr.h59 *ctxt_mdscr_el1(ctxt) = read_sysreg(mdscr_el1); in __sysreg_save_common_state()
68 ctxt_sys_reg(ctxt, TPIDR_EL0) = read_sysreg(tpidr_el0); in __sysreg_save_user_state()
69 ctxt_sys_reg(ctxt, TPIDRRO_EL0) = read_sysreg(tpidrro_el0); in __sysreg_save_user_state()
162 ctxt_sys_reg(ctxt, TPIDR_EL1) = read_sysreg(tpidr_el1); in __sysreg_save_el1_state()
169 ctxt_sys_reg(ctxt, SP_EL1) = read_sysreg(sp_el1); in __sysreg_save_el1_state()
348 vcpu->arch.ctxt.spsr_abt = read_sysreg(spsr_abt); in __sysreg32_save_state()
349 vcpu->arch.ctxt.spsr_und = read_sysreg(spsr_und); in __sysreg32_save_state()
350 vcpu->arch.ctxt.spsr_irq = read_sysreg(spsr_irq); in __sysreg32_save_state()
351 vcpu->arch.ctxt.spsr_fiq = read_sysreg(spsr_fiq); in __sysreg32_save_state()
353 __vcpu_assign_sys_reg(vcpu, DACR32_EL2, read_sysreg(dacr32_el2)); in __sysreg32_save_state()
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A Ddebug-sr.h18 #define read_debug(r,n) read_sysreg(r##n##_el1)
117 ctxt_sys_reg(ctxt, MDCCINT_EL1) = read_sysreg(mdccint_el1); in __debug_save_state()
A Dswitch.h48 __vcpu_assign_sys_reg(vcpu, FPEXC32_EL2, read_sysreg(fpexc32_el2)); in __fpsimd_save_fpexc32()
429 ctxt_sys_reg(hctxt, PMUSERENR_EL0) = read_sysreg(pmuserenr_el0); in __activate_traps_common()
434 *host_data_ptr(host_debug_state.mdcr_el2) = read_sysreg(mdcr_el2); in __activate_traps_common()
528 *hcr |= read_sysreg(hcr_el2) & HCR_VSE; in ___deactivate_traps()
721 if (!(read_sysreg(hcr_el2) & HCR_RW)) in kvm_hyp_handle_fpsimd()
1048 unsigned long elr_el2 = read_sysreg(elr_el2); in __kvm_unexpected_el2_exception()
A Dfault.h90 hpfar = read_sysreg(hpfar_el2); in __get_fault_info()
/arch/arm/include/asm/
A Darm_pmuv3.h96 return read_sysreg(PMEVCNTR##n)
119 return read_sysreg(PMMIR); in read_pmmir()
143 return read_sysreg(PMCR); in read_pmcr()
158 return read_sysreg(PMCCNTR); in read_pmccntr()
207 return read_sysreg(PMOVSR); in read_pmovsclr()
262 u64 val = read_sysreg(PMCEID0); in read_pmceid0()
265 val |= (u64)read_sysreg(PMCEID2) << 32; in read_pmceid0()
272 u64 val = read_sysreg(PMCEID1); in read_pmceid1()
275 val |= (u64)read_sysreg(PMCEID3) << 32; in read_pmceid1()
A Darch_gicv3.h48 return read_sysreg(a32); \
75 u32 irqstat = read_sysreg(ICC_IAR1); in gic_read_iar()
90 return read_sysreg(ICC_CTLR); in gic_read_ctlr()
106 return read_sysreg(ICC_SRE); in gic_read_sre()
122 return read_sysreg(ICC_PMR); in gic_read_pmr()
132 return read_sysreg(ICC_RPR); in gic_read_rpr()
/arch/arm64/kernel/
A Dentry-common.c360 reg = read_sysreg(mdscr_el1); in cortex_a76_erratum_1463225_svc_handler()
477 unsigned long far = read_sysreg(far_el1); in el1_abort()
488 unsigned long far = read_sysreg(far_el1); in el1_pc()
563 unsigned long far = read_sysreg(far_el1); in el1_watchpt()
592 unsigned long esr = read_sysreg(esr_el1); in el1h_64_sync_handler()
683 unsigned long esr = read_sysreg(esr_el1); in el1h_64_error_handler()
693 unsigned long far = read_sysreg(far_el1); in el0_da()
703 unsigned long far = read_sysreg(far_el1); in el0_ia()
761 unsigned long far = read_sysreg(far_el1); in el0_pc()
855 unsigned long far = read_sysreg(far_el1); in el0_watchpt()
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A Dsdei.c214 u64 elr = read_sysreg(elr_el1); in do_sdei_event()
215 u32 kernel_mode = read_sysreg(CurrentEL) | 1; /* +SPSel */ in do_sdei_event()
216 unsigned long vbar = read_sysreg(vbar_el1); in do_sdei_event()
231 if (elr != read_sysreg(elr_el1)) { in do_sdei_event()
A Dvmcore_info.c17 return (read_sysreg(tcr_el1) & TCR_T1SZ_MASK) >> TCR_T1SZ_OFFSET; in get_tcr_el1_t1sz()
A Dirq.c121 WARN_ON(read_sysreg(daif) & PSR_A_BIT); in init_IRQ()
/arch/arm64/kernel/pi/
A Dmap_kernel.c137 u64 sctlr = read_sysreg(sctlr_el1); in set_ttbr0_for_lpa2()
138 u64 tcr = read_sysreg(tcr_el1) | TCR_DS; in set_ttbr0_for_lpa2()
139 u64 mmfr0 = read_sysreg(id_aa64mmfr0_el1); in set_ttbr0_for_lpa2()
/arch/arm64/kvm/hyp/vhe/
A Dsysreg-sr.c21 __vcpu_assign_sys_reg(vcpu, PAR_EL1, read_sysreg(par_el1)); in __sysreg_save_vel2_state()
22 __vcpu_assign_sys_reg(vcpu, TPIDR_EL1, read_sysreg(tpidr_el1)); in __sysreg_save_vel2_state()
77 __vcpu_assign_sys_reg(vcpu, SP_EL2, read_sysreg(sp_el1)); in __sysreg_save_vel2_state()
/arch/arm64/kvm/
A Ddebug.c68 u64 dfr0 = read_sysreg(id_aa64dfr0_el1); in kvm_init_host_debug_data()
72 read_sysreg(pmcr_el0)); in kvm_init_host_debug_data()
/arch/arm/include/asm/vdso/
A Dcp15.h24 #define read_sysreg(...) __read_sysreg(__VA_ARGS__) macro
A Dgettimeofday.h129 cycle_now = read_sysreg(CNTVCT); in __arch_get_hw_counter()
/arch/arm64/kvm/hyp/
A Dvgic-v2-cpuif-proxy.c23 return !!(read_sysreg(SCTLR_EL1) & SCTLR_ELx_EE); in __is_be()

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