| /arch/arm/mach-artpec/ |
| A D | board-artpec6.c | 32 struct regmap *regmap; in artpec6_init_machine() local
34 regmap = syscon_regmap_lookup_by_compatible("axis,artpec6-syscon"); in artpec6_init_machine()
36 if (!IS_ERR(regmap)) { in artpec6_init_machine()
40 regmap_write(regmap, ARTPEC6_DMACFG_REGNUM, in artpec6_init_machine()
|
| /arch/parisc/net/ |
| A D | bpf_jit_comp32.c | 73 static const s8 regmap[][2] = { variable
179 const s8 *r0 = regmap[BPF_REG_0]; in __build_epilogue()
271 bpf_put_reg64(regmap[TMP_REG_R0], regmap[BPF_REG_0], ctx); in bpf_save_R0()
276 bpf_get_reg64(regmap[TMP_REG_R0], regmap[BPF_REG_0], ctx); in bpf_restore_R0()
889 const s8 *r0 = regmap[BPF_REG_0]; in emit_call()
1547 dst = regmap[BPF_REG_5]; in bpf_jit_build_prologue()
1557 dst = regmap[BPF_REG_4]; in bpf_jit_build_prologue()
1567 dst = regmap[BPF_REG_3]; in bpf_jit_build_prologue()
1577 dst = regmap[BPF_REG_2]; in bpf_jit_build_prologue()
1587 dst = regmap[BPF_REG_1]; in bpf_jit_build_prologue()
[all …]
|
| A D | bpf_jit_comp64.c | 20 static const int regmap[] = { variable
64 u8 reg = regmap[bpf_reg]; in bpf_to_hppa_reg()
350 const s8 arr_reg = regmap[BPF_REG_2]; in emit_bpf_tail_call()
351 const s8 idx_reg = regmap[BPF_REG_3]; in emit_bpf_tail_call()
469 emit_hppa_copy(regmap[BPF_REG_1], HPPA_REG_ARG0, ctx); in emit_call()
470 emit_hppa_copy(regmap[BPF_REG_2], HPPA_REG_ARG1, ctx); in emit_call()
471 emit_hppa_copy(regmap[BPF_REG_3], HPPA_REG_ARG2, ctx); in emit_call()
472 emit_hppa_copy(regmap[BPF_REG_4], HPPA_REG_ARG3, ctx); in emit_call()
1164 if (REG_WAS_SEEN(ctx, regmap[dst]) || \ in bpf_jit_build_prologue()
1166 emit_hppa_copy(arg, regmap[dst], ctx) in bpf_jit_build_prologue()
[all …]
|
| /arch/arm/boot/dts/samsung/ |
| A D | exynos-syscon-restart.dtsi | 9 regmap = <&pmu_system_controller>;
16 regmap = <&pmu_system_controller>;
|
| /arch/arm/mach-rockchip/ |
| A D | pm.c | 37 static struct regmap *pmu_regmap;
38 static struct regmap *sgrf_regmap;
39 static struct regmap *grf_regmap;
|
| /arch/arm/mach-imx/ |
| A D | mach-imx6q.c | 84 struct regmap *gpr; in imx6q_1588_init()
138 struct regmap *gpr; in imx6q_axi_init()
|
| A D | mach-imx7ulp.c | 22 struct regmap *sim; in imx7ulp_set_revision()
|
| A D | mach-imx6sl.c | 20 struct regmap *gpr; in imx6sl_fec_init()
|
| A D | mach-imx7d.c | 40 struct regmap *gpr; in imx7d_enet_clk_sel()
|
| A D | anatop.c | 35 static struct regmap *anatop;
|
| /arch/arm/mach-alpine/ |
| A D | alpine_cpu_pm.c | 20 static struct regmap *al_sysfabric;
|
| /arch/arm/mach-davinci/ |
| A D | da8xx.h | 77 struct regmap *da8xx_get_cfgchip(void);
|
| /arch/arm/mach-versatile/ |
| A D | platsmp-realview.c | 43 struct regmap *map; in realview_smp_prepare_cpus()
|
| A D | integrator_cp.c | 24 static struct regmap *cm_map;
|
| A D | integrator_ap.c | 27 static struct regmap *ap_syscon_map;
|
| /arch/x86/include/asm/ |
| A D | intel_telemetry.h | 44 void __iomem *regmap; member
|
| /arch/arm64/boot/dts/apm/ |
| A D | apm-merlin.dts | 41 regmap = <&poweroff_mbox>;
|
| A D | apm-mustang.dts | 41 regmap = <&poweroff_mbox>;
|
| A D | apm-shadowcat.dtsi | 418 regmap = <&scu>;
448 regmap-csw = <&csw>;
449 regmap-mcba = <&mcba>;
450 regmap-mcbb = <&mcbb>;
451 regmap-efuse = <&efuse>;
521 regmap-csw = <&csw>;
522 regmap-mcba = <&mcba>;
523 regmap-mcbb = <&mcbb>;
|
| A D | apm-storm.dtsi | 457 regmap = <&scu>;
492 regmap-csw = <&csw>;
493 regmap-mcba = <&mcba>;
494 regmap-mcbb = <&mcbb>;
495 regmap-efuse = <&efuse>;
496 regmap-rb = <&rb>;
566 regmap-csw = <&csw>;
567 regmap-mcba = <&mcba>;
568 regmap-mcbb = <&mcbb>;
|
| /arch/mips/boot/dts/brcm/ |
| A D | bcm3368.dtsi | 71 regmap = <&periph_cntl>;
|
| /arch/arm/mach-zynq/ |
| A D | slcr.c | 30 static struct regmap *zynq_slcr_regmap;
|
| /arch/loongarch/net/ |
| A D | bpf_jit.c | 22 static const int regmap[] = { variable
185 emit_insn(ctx, addid, regmap[BPF_REG_FP], LOONGARCH_GPR_SP, bpf_stack_adjust); in build_prologue()
233 emit_insn(ctx, addiw, LOONGARCH_GPR_A0, regmap[BPF_REG_0], 0); in __build_epilogue()
332 const u8 r0 = regmap[BPF_REG_0]; in emit_atomic()
333 const u8 src = regmap[insn->src_reg]; in emit_atomic()
334 const u8 dst = regmap[insn->dst_reg]; in emit_atomic()
514 const u8 src = regmap[insn->src_reg]; in build_insn()
515 const u8 dst = regmap[insn->dst_reg]; in build_insn()
959 move_reg(ctx, regmap[BPF_REG_0], LOONGARCH_GPR_A0); in build_insn()
1407 emit_insn(ctx, std, regmap[BPF_REG_0], LOONGARCH_GPR_FP, -(retval_off - 8)); in invoke_bpf_prog()
[all …]
|
| /arch/arm/boot/dts/mediatek/ |
| A D | mt8135.dtsi | 149 * regmap. Register 0x1000b000 is used by EINT.
154 mediatek,pctl-regmap = <&syscfg_pctl_a &syscfg_pctl_b>;
|
| /arch/mips/boot/dts/mti/ |
| A D | malta.dts | 97 regmap = <&fpga_regs>;
|