Searched refs:seq_state (Results 1 – 2 of 2) sorted by relevance
46 u32 stat, seq_state; in power_up_other_cluster() local54 seq_state = stat & CPC_Cx_STAT_CONF_SEQSTATE; in power_up_other_cluster()55 seq_state >>= __ffs(CPC_Cx_STAT_CONF_SEQSTATE); in power_up_other_cluster()56 if (seq_state == CPC_Cx_STAT_CONF_SEQSTATE_U5) in power_up_other_cluster()71 seq_state = stat & CPC_Cx_STAT_CONF_SEQSTATE; in power_up_other_cluster()72 seq_state >>= __ffs(CPC_Cx_STAT_CONF_SEQSTATE); in power_up_other_cluster()73 if (seq_state == CPC_Cx_STAT_CONF_SEQSTATE_U5) in power_up_other_cluster()475 u32 access, stat, seq_state; in boot_core() local568 seq_state = stat & CPC_Cx_STAT_CONF_SEQSTATE; in boot_core()569 seq_state >>= __ffs(CPC_Cx_STAT_CONF_SEQSTATE); in boot_core()[all …]
938 const char *seq_state; in cia_decode_mem_error() local973 seq_state = "Idle"; in cia_decode_mem_error()976 seq_state = "DMA READ or DMA WRITE"; in cia_decode_mem_error()979 seq_state = "READ MISS (or READ MISS MODIFY) with victim"; in cia_decode_mem_error()982 seq_state = "READ MISS (or READ MISS MODIFY) with no victim"; in cia_decode_mem_error()985 seq_state = "Refresh"; in cia_decode_mem_error()988 seq_state = "Idle, waiting for DMA pending read"; in cia_decode_mem_error()991 seq_state = "Idle, ras precharge"; in cia_decode_mem_error()994 seq_state = "Unknown"; in cia_decode_mem_error()1024 printk(KERN_CRIT " Memory sequencer state: %s\n", seq_state); in cia_decode_mem_error()
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