| /arch/xtensa/lib/ |
| A D | ashldi3.S | 8 #define ul a3 macro
11 #define ul a2 macro
19 src uh, uh, ul
20 sll ul, ul
24 sll uh, ul
25 movi ul, 0
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| A D | lshrdi3.S | 8 #define ul a3 macro
11 #define ul a2 macro
19 src ul, uh, ul
24 srl ul, uh
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| A D | ashrdi3.S | 8 #define ul a3 macro
11 #define ul a2 macro
19 src ul, uh, ul
24 sra ul, uh
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| /arch/alpha/lib/ |
| A D | checksum.c | 26 unsigned long ul; in from64to16() member
31 in_v.ul = x; in from64to16()
32 tmp_v.ul = (unsigned long) in_v.ui[0] + (unsigned long) in_v.ui[1]; in from64to16()
36 out_v.ul = (unsigned long) tmp_v.us[0] + (unsigned long) tmp_v.us[1] in from64to16()
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| A D | csum_partial_copy.c | 61 unsigned long ul; in from64to16() member
66 in_v.ul = x; in from64to16()
67 tmp_v.ul = (unsigned long) in_v.ui[0] + (unsigned long) in_v.ui[1]; in from64to16()
71 out_v.ul = (unsigned long) tmp_v.us[0] + (unsigned long) tmp_v.us[1] in from64to16()
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| /arch/mips/include/asm/ |
| A D | bitops.h | 363 if (!(word & (~0ul << 32))) { in __fls()
368 if (!(word & (~0ul << (BITS_PER_LONG-16)))) { in __fls()
372 if (!(word & (~0ul << (BITS_PER_LONG-8)))) { in __fls()
376 if (!(word & (~0ul << (BITS_PER_LONG-4)))) { in __fls()
380 if (!(word & (~0ul << (BITS_PER_LONG-2)))) { in __fls()
384 if (!(word & (~0ul << (BITS_PER_LONG-1)))) in __fls()
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| /arch/mips/kvm/ |
| A D | mmu.c | 175 unsigned long end = ~0ul; in kvm_mips_flush_gpa_pmd()
203 unsigned long end = ~0ul; in kvm_mips_flush_gpa_pud()
232 unsigned long end = ~0ul; in kvm_mips_flush_gpa_pgd()
307 unsigned long cur_end = ~0ul; \
330 unsigned long cur_end = ~0ul; \
354 unsigned long cur_end = ~0ul; \
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| /arch/arm64/include/asm/ |
| A D | vectors.h | 59 #define TRAMP_VALIAS 0ul
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| /arch/arm/mm/ |
| A D | mm.h | 84 #define arm_dma_pfn_limit (~0ul >> PAGE_SHIFT)
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| /arch/powerpc/platforms/cell/spufs/ |
| A D | switch.c | 116 spu_int_mask_set(spu, 0, 0ul); in disable_interrupts()
117 spu_int_mask_set(spu, 1, 0ul); in disable_interrupts()
118 spu_int_mask_set(spu, 2, 0ul); in disable_interrupts()
758 spu_int_mask_set(spu, 0, 0ul); in enable_interrupts()
760 spu_int_mask_set(spu, 2, 0ul); in enable_interrupts()
1407 spu_int_mask_set(spu, 0, 0ul); in clear_interrupts()
1408 spu_int_mask_set(spu, 1, 0ul); in clear_interrupts()
1409 spu_int_mask_set(spu, 2, 0ul); in clear_interrupts()
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| /arch/powerpc/include/asm/ |
| A D | spu.h | 648 #define SPU_ECC_CORRECTED_ERROR (1ull << 0ul)
658 #define SPU_ERR_ILLEGAL_INSTR (1ull << 0ul)
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| A D | cputable.h | 542 #define CPU_FTRS_DT_CPU_BASE (~0ul)
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| /arch/sparc/kernel/ |
| A D | iommu-common.c | 117 align_mask = ~0ul >> (BITS_PER_LONG - align_order); in iommu_tbl_range_alloc()
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| /arch/x86/include/asm/xen/ |
| A D | page.h | 109 unsigned long rval = ~0ul; in xen_safe_read_ulong()
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| /arch/powerpc/include/asm/book3s/64/ |
| A D | radix.h | 197 old_pte = radix__pte_update(mm, addr, ptep, ~0ul, 0, 0); in radix__ptep_get_and_clear_full()
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| /arch/x86/mm/ |
| A D | extable.c | 82 if (addr == ~0ul) in ex_handler_zeropad()
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| /arch/mips/kernel/ |
| A D | module.c | 190 se_bits = (offset & BIT(bits - 1)) ? ~0ul : 0; in apply_r_mips_pc()
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| A D | cpu-probe.c | 692 write_c0_memorymapid(~0ul); in decode_config5()
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| /arch/powerpc/lib/ |
| A D | sstep.c | 409 unsigned long ul; in read_mem_unaligned() member
415 u.ul = 0; in read_mem_unaligned()
419 *dest = u.ul; in read_mem_unaligned()
545 unsigned long ul; in write_mem_unaligned() member
550 u.ul = val; in write_mem_unaligned()
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| /arch/powerpc/platforms/cell/ |
| A D | spu_base.c | 316 spu_mfc_dsisr_set(spu, 0ul); in spu_irq_class_1()
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| /arch/x86/xen/ |
| A D | setup.c | 937 set_phys_range_identity(addr / PAGE_SIZE, ~0ul); in xen_memory_setup()
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| /arch/powerpc/platforms/pseries/ |
| A D | papr_scm.c | 26 #define BIND_ANY_ADDR (~0ul)
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| /arch/x86/kernel/apic/ |
| A D | x2apic_uv_x.c | 71 return ~0ul; in uv_undefined()
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| /arch/mips/mm/ |
| A D | tlbex.c | 2508 write_c0_entrylo0(~0ul); in check_pabits()
|