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Searched refs:AMDGPU_IRQ_STATE_DISABLE (Results 1 – 25 of 32) sorted by relevance

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/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_irq.h42 AMDGPU_IRQ_STATE_DISABLE, enumerator
A Damdgpu_irq.c143 AMDGPU_IRQ_STATE_DISABLE); in amdgpu_irq_disable_all()
544 state = AMDGPU_IRQ_STATE_DISABLE; in amdgpu_irq_update()
A Dsi_dma.c601 case AMDGPU_IRQ_STATE_DISABLE: in si_dma_set_trap_irq_state()
617 case AMDGPU_IRQ_STATE_DISABLE: in si_dma_set_trap_irq_state()
A Dsdma_v2_4.c994 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v2_4_set_trap_irq_state()
1010 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v2_4_set_trap_irq_state()
A Dcik_sdma.c1095 case AMDGPU_IRQ_STATE_DISABLE: in cik_sdma_set_trap_irq_state()
1111 case AMDGPU_IRQ_STATE_DISABLE: in cik_sdma_set_trap_irq_state()
A Damdgpu_vkms.c189 amdgpu_crtc->vsync_timer_enabled = AMDGPU_IRQ_STATE_DISABLE; in amdgpu_vkms_crtc_init()
A Dsdma_v3_0.c1332 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v3_0_set_trap_irq_state()
1348 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v3_0_set_trap_irq_state()
A Ddce_v8_0.c2958 case AMDGPU_IRQ_STATE_DISABLE: in dce_v8_0_set_crtc_vblank_interrupt_state()
3009 case AMDGPU_IRQ_STATE_DISABLE: in dce_v8_0_set_crtc_vline_interrupt_state()
3037 case AMDGPU_IRQ_STATE_DISABLE: in dce_v8_0_set_hpd_irq_state()
3152 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v8_0_set_pageflip_irq_state()
A Dgmc_v9_0.c428 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v9_0_ecc_interrupt_state()
480 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v9_0_vm_fault_interrupt_state()
A Dgmc_v11_0.c67 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v11_0_vm_fault_interrupt_state()
A Dgmc_v12_0.c58 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v12_0_vm_fault_interrupt_state()
A Dgfx_v6_0.c3194 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_gfx_eop_interrupt_state()
3215 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_compute_eop_interrupt_state()
3257 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_priv_reg_fault_state()
3282 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_priv_inst_fault_state()
A Ddce_v10_0.c3024 case AMDGPU_IRQ_STATE_DISABLE: in dce_v10_0_set_crtc_vblank_interrupt_state()
3053 case AMDGPU_IRQ_STATE_DISABLE: in dce_v10_0_set_crtc_vline_interrupt_state()
3083 case AMDGPU_IRQ_STATE_DISABLE: in dce_v10_0_set_hpd_irq_state()
3161 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v10_0_set_pageflip_irq_state()
A Dgmc_v10_0.c68 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v10_0_vm_fault_interrupt_state()
A Ddce_v11_0.c3155 case AMDGPU_IRQ_STATE_DISABLE: in dce_v11_0_set_crtc_vblank_interrupt_state()
3184 case AMDGPU_IRQ_STATE_DISABLE: in dce_v11_0_set_crtc_vline_interrupt_state()
3214 case AMDGPU_IRQ_STATE_DISABLE: in dce_v11_0_set_hpd_irq_state()
3292 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v11_0_set_pageflip_irq_state()
A Dgmc_v6_0.c1044 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v6_0_vm_fault_interrupt_state()
A Dgfx_v7_0.c4588 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_gfx_eop_interrupt_state()
4639 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_compute_eop_interrupt_state()
4662 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_priv_reg_fault_state()
4687 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_priv_inst_fault_state()
A Dgfx_v8_0.c6359 state == AMDGPU_IRQ_STATE_DISABLE ? 0 : 1); in gfx_v8_0_set_gfx_eop_interrupt_state()
6398 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v8_0_set_compute_eop_interrupt_state()
6419 state == AMDGPU_IRQ_STATE_DISABLE ? 0 : 1); in gfx_v8_0_set_priv_reg_fault_state()
6430 state == AMDGPU_IRQ_STATE_DISABLE ? 0 : 1); in gfx_v8_0_set_priv_inst_fault_state()
6482 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v8_0_set_cp_ecc_int_state()
6527 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v8_0_set_sq_int_state()
A Dgfx_v12_0.c4725 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v12_0_set_gfx_eop_interrupt_state()
4776 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v12_0_set_compute_eop_interrupt_state()
4889 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v12_0_set_priv_reg_fault_state()
4935 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v12_0_set_bad_op_fault_state()
4980 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v12_0_set_priv_inst_fault_state()
A Ddce_v6_0.c2986 case AMDGPU_IRQ_STATE_DISABLE: in dce_v6_0_set_crtc_vblank_interrupt_state()
3021 case AMDGPU_IRQ_STATE_DISABLE: in dce_v6_0_set_hpd_irq_state()
3136 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v6_0_set_pageflip_irq_state()
A Dgfx_v11_0.c6316 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v11_0_set_gfx_eop_interrupt_state()
6373 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v11_0_set_compute_eop_interrupt_state()
6486 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v11_0_set_priv_reg_fault_state()
6532 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v11_0_set_bad_op_fault_state()
6577 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v11_0_set_priv_inst_fault_state()
6688 if (state == AMDGPU_IRQ_STATE_DISABLE) {
A Dgfx_v9_0.c5938 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_gfx_eop_interrupt_state()
5985 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_compute_eop_interrupt_state()
6036 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_priv_reg_fault_state()
6072 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_bad_op_fault_state()
6105 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_priv_inst_fault_state()
6132 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_cp_ecc_error_state()
A Dgmc_v7_0.c1229 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v7_0_vm_fault_interrupt_state()
A Dgfx_v9_4_3.c3099 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_4_3_xcc_set_compute_eop_interrupt_state()
3151 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_4_3_set_priv_reg_fault_state()
3191 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_4_3_set_bad_op_fault_state()
3230 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_4_3_set_priv_inst_fault_state()
A Dgmc_v8_0.c1398 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v8_0_vm_fault_interrupt_state()

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