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Searched refs:DIV_MASK (Results 1 – 3 of 3) sorted by relevance

/drivers/clk/samsung/
A Dclk-cpu.c116 #define DIV_MASK GENMASK(2, 0) macro
184 #define E4210_DIV0_ATB_MASK (DIV_MASK << E4210_DIV0_ATB_SHIFT)
238 unsigned long alt_div, alt_div_mask = DIV_MASK; in exynos_cpuclk_pre_rate_change()
281 unsigned long div = 0, div_mask = DIV_MASK; in exynos_cpuclk_post_rate_change()
359 unsigned long alt_div, alt_div_mask = DIV_MASK; in exynos5433_cpuclk_pre_rate_change()
390 unsigned long div = 0, div_mask = DIV_MASK; in exynos5433_cpuclk_post_rate_change()
/drivers/gpu/drm/imx/dc/
A Ddc-ed.c21 #define DIV_MASK GENMASK(23, 16) macro
22 #define DIV(x) FIELD_PREP(DIV_MASK, (x))
137 regmap_write_bits(ed->reg_pec, PIXENGCFG_STATIC, DIV_MASK, in dc_ed_pec_div_reset()
/drivers/clk/tegra/
A Dclk-sdmmc-mux.c20 #define DIV_MASK GENMASK(7, 0) macro
25 #define get_max_div(d) DIV_MASK
26 #define get_div_field(val) ((val) & DIV_MASK)

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