Searched refs:DSPADDR (Results 1 – 4 of 4) sorted by relevance
| /drivers/gpu/drm/i915/display/ |
| A D | i9xx_plane.c | 517 intel_de_write_fw(display, DSPADDR(display, i9xx_plane), in i9xx_plane_update_arm()
561 intel_de_write_fw(display, DSPADDR(display, i9xx_plane), 0); in i9xx_plane_disable_arm()
595 error->surf = intel_de_read(display, DSPADDR(display, i9xx_plane)); in i8xx_plane_capture_error()
925 reg = intel_de_read_fw(display, DSPADDR(display, i9xx_plane)); in i9xx_disable_tiling()
926 intel_de_write_fw(display, DSPADDR(display, i9xx_plane), reg); in i9xx_disable_tiling()
1222 base = intel_de_read(display, DSPADDR(display, i9xx_plane)); in i9xx_get_initial_plane_config()
1274 intel_de_write(display, DSPADDR(display, i9xx_plane), base); in i9xx_fixup_initial_plane_config()
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| A D | i9xx_plane_regs.h | 49 #define DSPADDR(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAADDR) macro
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| A D | intel_fbc.c | 376 intel_de_write_fw(display, DSPADDR(display, i9xx_plane), in i8xx_fbc_nuke()
377 intel_de_read_fw(display, DSPADDR(display, i9xx_plane))); in i8xx_fbc_nuke()
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| /drivers/gpu/drm/i915/ |
| A D | intel_gvt_mmio_table.c | 176 MMIO_D(DSPADDR(dev_priv, PIPE_A)); in iterate_generic_mmio()
185 MMIO_D(DSPADDR(dev_priv, PIPE_B)); in iterate_generic_mmio()
194 MMIO_D(DSPADDR(dev_priv, PIPE_C)); in iterate_generic_mmio()
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