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/drivers/staging/axis-fifo/
A DKconfig3 # "Xilinx AXI-Stream FIFO IP core driver"
6 tristate "Xilinx AXI-Stream FIFO IP core driver"
9 This adds support for the Xilinx AXI-Stream FIFO IP core driver.
10 The AXI Streaming FIFO allows memory mapped access to a AXI Streaming
11 interface. The Xilinx AXI-Stream FIFO IP core can be used to interface
A Daxis-fifo.txt1 Xilinx AXI-Stream FIFO v4.1 IP core
37 - xlnx,rx-fifo-depth: Depth of RX FIFO in words
45 - xlnx,tx-fifo-depth: Depth of TX FIFO in words
51 - xlnx,use-rx-data: <0x1> if RX FIFO is enabled, <0x0> otherwise
54 - xlnx,use-tx-data: <0x1> if TX FIFO is enabled, <0x0> otherwise
/drivers/video/fbdev/riva/
A Driva_hw.c1351 LOAD_FIXED_STATE(nv4,FIFO); in UpdateFifoState()
1362 LOAD_FIXED_STATE(nv10,FIFO); in UpdateFifoState()
1645 LOAD_FIXED_STATE(Riva,FIFO); in LoadStateExt()
1841 (RivaSurface __iomem *)&(chip->FIFO[0x0000E000/4]); in nv3SetSurfaces2D()
1844 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000003); in nv3SetSurfaces2D()
1846 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000004); in nv3SetSurfaces2D()
1848 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000013); in nv3SetSurfaces2D()
1858 (RivaSurface __iomem *)&(chip->FIFO[0x0000E000/4]); in nv4SetSurfaces2D()
1860 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000003); in nv4SetSurfaces2D()
1862 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000004); in nv4SetSurfaces2D()
[all …]
A Dnv_driver.c332 par->riva.FIFO = in riva_common_setup()
A Driva_hw.h454 volatile U032 __iomem *FIFO; member
/drivers/scsi/aic7xxx/
A Daic79xx.seq179 * the FIFO to complete the SCB.
308 * The FIFO use count field is shared with the
874 * Command retry. Free our current FIFO and
875 * re-allocate a FIFO so transfer state is
1234 * SCB is not transferring in the other FIFO.
1484 * any FIFO, it is important that we service a FIFO
1494 * this FIFO.
1499 * Switch to the other FIFO. Non-RTI chips
1512 * FIFO not currently on the bus first.
1543 * request in the other FIFO.
[all …]
A Daic79xx.reg424 * Data FIFO Control
462 * Data FIFO Status
617 * Data FIFO Threshold
1692 * Data FIFO Status
2394 * Good Status FIFO
2506 * Data FIFO Status
2543 * Data FIFO Queue Tag
3239 * Data FIFO Data
3305 * Data FIFO Pointers
3361 * Data FIFO Space Count
[all …]
A Daic7xxx.seq1022 * true every time the PCI FIFO empties
1023 * regardless of the state of the SCSI FIFO.
1025 * SCSI FIFO to get data into the PCI FIFO
1043 * the data FIFO and acked them on the bus. The only
1046 * and then test to see if the data FIFO is non-empty.
1416 * On the 7895 the data FIFO will
1419 * the FIFO while it is enabled. So,
2250 * retry if the data FIFO is empty. If the
2256 * will drain the FIFO as data are made available.
2258 * of 8 bytes is in the FIFO because the PCI
[all …]
A Daic7xxx.reg1029 * Queue In FIFO (p. 3-60)
1049 * Queue Out FIFO (p. 3-61)
1075 * Number of queued SCBs in the Out FIFO
/drivers/edac/
A DKconfig429 bool "Altera Ethernet FIFO ECC"
436 bool "Altera NAND FIFO ECC"
440 Altera NAND FIFO Memory for Altera SoCs.
443 bool "Altera DMA FIFO ECC"
447 Altera DMA FIFO Memory for Altera SoCs.
450 bool "Altera USB FIFO ECC"
454 Altera USB FIFO Memory for Altera SoCs.
457 bool "Altera QSPI FIFO ECC"
461 Altera QSPI FIFO Memory for Altera SoCs.
464 bool "Altera SDMMC FIFO ECC"
[all …]
/drivers/video/fbdev/nvidia/
A Dnv_local.h92 NV_WR32(&(par)->FIFO[0x0010], 0, (data) << 2); \
96 #define READ_GET(par) (NV_RD32(&(par)->FIFO[0x0011], 0) >> 2)
A Dnv_type.h166 volatile u32 __iomem *FIFO; member
A Dnv_setup.c304 par->FIFO = par->REGS + (0x00800000 / 4); in NVCommonSetup()
/drivers/char/tpm/
A DKconfig62 tristate "TPM Interface Specification 1.2 Interface / TPM 2.0 FIFO Interface"
67 TCG TIS 1.2 TPM specification (TPM1.2) or the TCG PTP FIFO
73 tristate "TPM Interface Specification 1.3 Interface / TPM 2.0 FIFO Interface - (SPI)"
79 TCG TIS 1.3 TPM specification (TPM1.2) or the TCG PTP FIFO
92 tristate "TPM Interface Specification 1.3 Interface / TPM 2.0 FIFO Interface - (I2C - generic)"
104 tristate "TPM Interface Specification 1.2 Interface / TPM 2.0 FIFO Interface (MMIO - SynQuacer)"
109 TCG TIS 1.2 TPM specification (TPM1.2) or the TCG PTP FIFO
/drivers/parport/
A DKconfig67 bool "Use FIFO/DMA if available"
73 As well as actually having a FIFO, or DMA capability, the kernel
76 FIFO. See <file:Documentation/admin-guide/parport.rst> to find out how to
A Dparport_pc.c490 const unsigned long fifo = FIFO(port); in parport_pc_fifo_write_block_pio()
774 outb(0, FIFO(port)); in parport_pc_compat_write_block_pio()
869 outb(0, FIFO(port)); in parport_pc_ecp_write_block_pio()
1599 outb(0xaa, FIFO(pb)); in parport_ECP_supported()
1618 inb(FIFO(pb)); in parport_ECP_supported()
1642 outb(0xaa, FIFO(pb)); in parport_ECP_supported()
1887 outb(0xaa, FIFO(pb)); in irq_probe_ECP()
/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
A Dhost.fuc33 // HOST (R)FIFO packet format
62 // HOST->PWR comms - dequeue message(s) for process(es) from FIFO
/drivers/usb/musb/
A DKconfig131 All data is copied between memory and FIFO by the CPU.
/drivers/net/ethernet/sis/
A Dsis190.c208 FIFO = 0x00020000, enumerator
667 #define TxErrMask (WND | TABRT | FIFO | LINK) in sis190_tx_pkt_err()
676 if (status & FIFO) in sis190_tx_pkt_err()
/drivers/tty/
A DKconfig343 to drain the FDC TX FIFO.
356 TX FIFO.
/drivers/tty/serial/
A Dsifive.c129 #error Driver does not support configurations with different TX, RX FIFO sizes
/drivers/iio/pressure/
A DKconfig28 configurable measurement averaging and internal FIFO. The
/drivers/hwtracing/coresight/
A DKconfig41 trace router - ETR) or sink (embedded trace FIFO). The driver
/drivers/i2c/busses/
A DKconfig1237 tristate "UniPhier FIFO-less I2C controller"
1241 the UniPhier FIFO-less I2C interface embedded in PH1-LD4, PH1-sLD8,
1245 tristate "UniPhier FIFO-builtin I2C controller"
1249 the UniPhier FIFO-builtin I2C interface embedded in PH1-Pro4,
/drivers/scsi/
A DFlashPoint.c492 #define FIFO BIT(4) macro
1739 if (hp_int & (FIFO | TIMEOUT | RESET | SCAM_SEL) || bm_status) { in FlashPoint_HandleInterrupt()
1744 (FIFO | TIMEOUT | RESET | SCAM_SEL)); in FlashPoint_HandleInterrupt()
2044 else if (p_int & FIFO) { in FPT_SccbMgr_bad_isr()
2046 WRW_HARPOON((p_port + hp_intstat), FIFO); in FPT_SccbMgr_bad_isr()

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