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Searched refs:MACRO_TILE_ASPECT (Results 1 – 16 of 16) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
A Dgfx_v6_0.c100 #define MACRO_TILE_ASPECT(x) ((x) << 18) macro
428 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v6_0_tiling_mode_table_init()
436 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v6_0_tiling_mode_table_init()
444 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v6_0_tiling_mode_table_init()
451 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v6_0_tiling_mode_table_init()
653 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4); in gfx_v6_0_tiling_mode_table_init()
661 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4); in gfx_v6_0_tiling_mode_table_init()
669 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4); in gfx_v6_0_tiling_mode_table_init()
677 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4); in gfx_v6_0_tiling_mode_table_init()
685 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2); in gfx_v6_0_tiling_mode_table_init()
[all …]
A Dgfx_v8_0.c2183 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v8_0_tiling_mode_table_init()
2187 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v8_0_tiling_mode_table_init()
2191 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v8_0_tiling_mode_table_init()
2195 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v8_0_tiling_mode_table_init()
2199 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v8_0_tiling_mode_table_init()
2203 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v8_0_tiling_mode_table_init()
2207 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v8_0_tiling_mode_table_init()
2211 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v8_0_tiling_mode_table_init()
2215 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v8_0_tiling_mode_table_init()
2375 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v8_0_tiling_mode_table_init()
[all …]
A Dgfx_v7_0.c1130 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v7_0_tiling_mode_table_init()
1134 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v7_0_tiling_mode_table_init()
1138 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v7_0_tiling_mode_table_init()
1142 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v7_0_tiling_mode_table_init()
1146 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v7_0_tiling_mode_table_init()
1150 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in gfx_v7_0_tiling_mode_table_init()
1154 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in gfx_v7_0_tiling_mode_table_init()
1158 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v7_0_tiling_mode_table_init()
1162 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v7_0_tiling_mode_table_init()
1166 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in gfx_v7_0_tiling_mode_table_init()
[all …]
A Dcikd.h202 # define MACRO_TILE_ASPECT(x) ((x) << 4) macro
A Ddce_v8_0.c1930 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v8_0_crtc_do_set_base()
A Ddce_v6_0.c2018 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v6_0_crtc_do_set_base()
A Ddce_v10_0.c1991 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v10_0_crtc_do_set_base()
A Ddce_v11_0.c2041 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v11_0_crtc_do_set_base()
/drivers/gpu/drm/radeon/
A Dsi.c2503 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()
2512 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()
2521 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()
2530 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()
2539 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()
2548 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()
2557 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1)); in si_tiling_mode_table_init()
2566 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()
2575 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()
2584 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2)); in si_tiling_mode_table_init()
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A Dcik.c2581 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in cik_tiling_mode_table_init()
2585 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in cik_tiling_mode_table_init()
2589 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in cik_tiling_mode_table_init()
2593 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in cik_tiling_mode_table_init()
2597 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()
2601 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()
2605 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_1) | in cik_tiling_mode_table_init()
2609 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in cik_tiling_mode_table_init()
2613 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_4) | in cik_tiling_mode_table_init()
2617 MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | in cik_tiling_mode_table_init()
[all …]
A Dsid.h1216 # define MACRO_TILE_ASPECT(x) ((x) << 18) macro
A Dcikd.h1270 # define MACRO_TILE_ASPECT(x) ((x) << 4) macro
A Devergreend.h2416 # define MACRO_TILE_ASPECT(x) (((x) & 0x3) << 6) macro
A Devergreen_cs.c2374 MACRO_TILE_ASPECT(mtaspect) | in evergreen_packet3_check()
/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_plane.c189 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags()
/drivers/gpu/drm/amd/include/
A Dnavi10_enum.h1766 typedef enum MACRO_TILE_ASPECT { enum
1771 } MACRO_TILE_ASPECT; typedef

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