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Searched refs:OutputLinkDPRate (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddisplay_mode_vba_util_32.c1356 enum dm_output_link_dp_rate OutputLinkDPRate, in dml32_CalculateOutputLink() argument
1403 if ((OutputLinkDPRate == dm_dp_rate_na || OutputLinkDPRate == dm_dp_rate_uhbr10) && in dml32_CalculateOutputLink()
1425 if ((OutputLinkDPRate == dm_dp_rate_na || OutputLinkDPRate == dm_dp_rate_uhbr13p5) && in dml32_CalculateOutputLink()
1448 if ((OutputLinkDPRate == dm_dp_rate_na || OutputLinkDPRate == dm_dp_rate_uhbr20) && in dml32_CalculateOutputLink()
1471 if ((OutputLinkDPRate == dm_dp_rate_na || OutputLinkDPRate == dm_dp_rate_hbr) && in dml32_CalculateOutputLink()
1495 if ((OutputLinkDPRate == dm_dp_rate_na || OutputLinkDPRate == dm_dp_rate_hbr2) && in dml32_CalculateOutputLink()
1521 …if ((OutputLinkDPRate == dm_dp_rate_na || OutputLinkDPRate == dm_dp_rate_hbr3) && *OutBpp == 0 && … in dml32_CalculateOutputLink()
A Ddisplay_mode_vba_util_32.h269 enum dm_output_link_dp_rate OutputLinkDPRate,
A Ddisplay_mode_vba_32.c2107 mode_lib->vba.OutputLinkDPRate[k], in dml32_ModeSupportAndSystemConfigurationFull()
2367 if (((mode_lib->vba.OutputLinkDPRate[k] == dm_dp_rate_hbr in dml32_ModeSupportAndSystemConfigurationFull()
2368 || mode_lib->vba.OutputLinkDPRate[k] == dm_dp_rate_hbr2 in dml32_ModeSupportAndSystemConfigurationFull()
2369 || mode_lib->vba.OutputLinkDPRate[k] == dm_dp_rate_hbr3) in dml32_ModeSupportAndSystemConfigurationFull()
2371 || ((mode_lib->vba.OutputLinkDPRate[k] == dm_dp_rate_uhbr10 in dml32_ModeSupportAndSystemConfigurationFull()
2372 || mode_lib->vba.OutputLinkDPRate[k] == dm_dp_rate_uhbr13p5 in dml32_ModeSupportAndSystemConfigurationFull()
2373 || mode_lib->vba.OutputLinkDPRate[k] == dm_dp_rate_uhbr20) in dml32_ModeSupportAndSystemConfigurationFull()
2379 && mode_lib->vba.OutputLinkDPRate[k] == dm_dp_rate_na) in dml32_ModeSupportAndSystemConfigurationFull()
/drivers/gpu/drm/amd/display/dc/dml2/
A Ddml2_utils.c127 dml_output_array->OutputLinkDPRate[dst_index] = dml_output_array->OutputLinkDPRate[src_index]; in dml2_util_copy_dml_output()
A Ddisplay_mode_core.c94 enum dml_output_link_dp_rate OutputLinkDPRate,
5361 enum dml_output_link_dp_rate OutputLinkDPRate, in CalculateOutputLink() argument
5409 …if ((OutputLinkDPRate == dml_dp_rate_na || OutputLinkDPRate == dml_dp_rate_uhbr10) && PHYCLKD32Per… in CalculateOutputLink()
5422 …if ((OutputLinkDPRate == dml_dp_rate_na || OutputLinkDPRate == dml_dp_rate_uhbr13p5) && *OutBpp ==… in CalculateOutputLink()
5436 …if ((OutputLinkDPRate == dml_dp_rate_na || OutputLinkDPRate == dml_dp_rate_uhbr20) && *OutBpp == 0… in CalculateOutputLink()
5451 …if ((OutputLinkDPRate == dml_dp_rate_na || OutputLinkDPRate == dml_dp_rate_hbr) && PHYCLKPerState … in CalculateOutputLink()
5467 …if ((OutputLinkDPRate == dml_dp_rate_na || OutputLinkDPRate == dml_dp_rate_hbr2) && *OutBpp == 0 &… in CalculateOutputLink()
5484 …if ((OutputLinkDPRate == dml_dp_rate_na || OutputLinkDPRate == dml_dp_rate_hbr3) && *OutBpp == 0 &… in CalculateOutputLink()
7114 mode_lib->ms.cache_display_cfg.output.OutputLinkDPRate[k], in dml_core_mode_support()
7330OutputLinkDPRate[k] == dml_dp_rate_hbr || mode_lib->ms.cache_display_cfg.output.OutputLinkDPRate[k… in dml_core_mode_support()
[all …]
A Ddisplay_mode_core_structs.h630 enum dml_output_link_dp_rate OutputLinkDPRate[__DML_NUM_PLANES__]; member
A Ddml2_translation_helper.c880 out->OutputLinkDPRate[location] = dml_dp_rate_na; in populate_dml_output_cfg_from_stream_state()
/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_mode_vba.h651 enum dm_output_link_dp_rate OutputLinkDPRate[DC__NUM_DPP__MAX]; member
A Ddisplay_mode_vba.c571 mode_lib->vba.OutputLinkDPRate[mode_lib->vba.NumberOfActivePlanes] = dout->dp_rate; in fetch_pipe_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddisplay_mode_vba_31.c4329 … if ((v->OutputLinkDPRate[k] == dm_dp_rate_na || v->OutputLinkDPRate[k] == dm_dp_rate_uhbr10) &&
4371 (v->OutputLinkDPRate[k] == dm_dp_rate_na || v->OutputLinkDPRate[k] == dm_dp_rate_uhbr13p5) &&
4413 (v->OutputLinkDPRate[k] == dm_dp_rate_na || v->OutputLinkDPRate[k] == dm_dp_rate_uhbr20) &&
/drivers/gpu/drm/amd/display/dc/dml/dcn314/
A Ddisplay_mode_vba_314.c4416 … if ((v->OutputLinkDPRate[k] == dm_dp_rate_na || v->OutputLinkDPRate[k] == dm_dp_rate_uhbr10) &&
4458 (v->OutputLinkDPRate[k] == dm_dp_rate_na || v->OutputLinkDPRate[k] == dm_dp_rate_uhbr13p5) &&
4500 (v->OutputLinkDPRate[k] == dm_dp_rate_na || v->OutputLinkDPRate[k] == dm_dp_rate_uhbr20) &&
/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
A Ddml2_core_dcn4_calcs.c4211 enum dml2_output_link_dp_rate OutputLinkDPRate, in CalculateOutputLink() argument
4241 DML_LOG_VERBOSE("DML::%s: OutputLinkDPRate = %u\n", __func__, OutputLinkDPRate); in CalculateOutputLink()
4271 …if ((OutputLinkDPRate == dml2_dp_rate_na || OutputLinkDPRate == dml2_dp_rate_uhbr10) && PHYCLKD32 … in CalculateOutputLink()
4284 …if ((OutputLinkDPRate == dml2_dp_rate_na || OutputLinkDPRate == dml2_dp_rate_uhbr13p5) && *OutBpp … in CalculateOutputLink()
4298 …if ((OutputLinkDPRate == dml2_dp_rate_na || OutputLinkDPRate == dml2_dp_rate_uhbr20) && *OutBpp ==… in CalculateOutputLink()
4313 …if ((OutputLinkDPRate == dml2_dp_rate_na || OutputLinkDPRate == dml2_dp_rate_hbr) && PHYCLK >= 270… in CalculateOutputLink()
4329 …if ((OutputLinkDPRate == dml2_dp_rate_na || OutputLinkDPRate == dml2_dp_rate_hbr2) && *OutBpp == 0… in CalculateOutputLink()
4346 …if ((OutputLinkDPRate == dml2_dp_rate_na || OutputLinkDPRate == dml2_dp_rate_hbr3) && *OutBpp == 0… in CalculateOutputLink()

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