Searched refs:RVU_MBOX_PF_VFPF1_INTX (Results 1 – 4 of 4) sorted by relevance
| /drivers/net/ethernet/marvell/octeontx2/nic/ |
| A D | cn20k.c | 118 otx2_write64(pf, RVU_MBOX_PF_VFPF1_INTX(0), ~0ull); in cn20k_enable_pfvf_mbox_intr()
119 otx2_write64(pf, RVU_MBOX_PF_VFPF1_INTX(1), ~0ull); in cn20k_enable_pfvf_mbox_intr()
144 otx2_write64(pf, RVU_MBOX_PF_VFPF1_INTX(0), ~0ull); in cn20k_disable_pfvf_mbox_intr()
148 otx2_write64(pf, RVU_MBOX_PF_VFPF1_INTX(1), ~0ull); in cn20k_disable_pfvf_mbox_intr()
212 RVU_MBOX_PF_VFPF1_INTX(0); in cn20k_register_pfvf_mbox_intr()
218 RVU_MBOX_PF_VFPF1_INTX(1); in cn20k_register_pfvf_mbox_intr()
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| A D | otx2_reg.h | 53 #define RVU_MBOX_PF_VFPF1_INTX(a) (0x1080 | (a) << 3) macro
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| /drivers/net/ethernet/marvell/octeontx2/af/cn20k/ |
| A D | mbox_init.c | 68 RVU_MBOX_PF_VFPF1_INTX(0); in cn20k_register_afvf_mbox_intr()
73 irq_data[vec].intr_status = RVU_MBOX_PF_VFPF1_INTX(1); in cn20k_register_afvf_mbox_intr()
370 rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INTX(0), INTR_MASK(vfs)); in cn20k_rvu_enable_afvf_intr()
383 rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INTX(1), INTR_MASK(vfs - 64)); in cn20k_rvu_enable_afvf_intr()
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| A D | reg.h | 65 #define RVU_MBOX_PF_VFPF1_INTX(a) (0x1080 | (a) << 3) macro
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