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Searched refs:SNPS_PHY_MPLLB_FRACN_REM (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dintel_snps_phy.c119 REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, 3),
291 REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, 4),
322 REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, 2),
354 REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, 3),
385 REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, 4),
433 REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, 71),
462 REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, 2),
492 REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, 2),
522 REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, 2),
733 REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, 0),
[all …]
A Dintel_snps_phy_regs.h47 #define SNPS_PHY_MPLLB_FRACN_REM REG_GENMASK(31, 16) macro
A Dintel_snps_hdmi_pll.c286 REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, pll_params.fracn_rem); in intel_snps_hdmi_pll_compute_mpllb()

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