Searched refs:clock_bits (Results 1 – 5 of 5) sorted by relevance
204 if (!clock_bits) in ucc_set_qe_mux_rxtx()233 clock_bits = 1; in ucc_get_tdm_common_clk()236 clock_bits = 2; in ucc_get_tdm_common_clk()239 clock_bits = 4; in ucc_get_tdm_common_clk()242 clock_bits = 5; in ucc_get_tdm_common_clk()254 clock_bits = 1; in ucc_get_tdm_common_clk()257 clock_bits = 2; in ucc_get_tdm_common_clk()260 clock_bits = 4; in ucc_get_tdm_common_clk()263 clock_bits = 5; in ucc_get_tdm_common_clk()492 int clock_bits; in ucc_get_tdm_rxtx_clk() local[all …]
47 u32 reserved = 0, clock_bits; in set_clock() local55 clock_bits = GPIO_CLOCK_DIR_IN | GPIO_CLOCK_DIR_MASK; in set_clock()57 clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK | in set_clock()59 REG_WRITE(chan->reg, reserved | clock_bits); in set_clock()
141 u32 clock_bits; in set_clock() local144 clock_bits = GPIO_CLOCK_DIR_IN | GPIO_CLOCK_DIR_MASK; in set_clock()146 clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK | in set_clock()149 GMBUS_REG_WRITE(gpio->reg, reserved | clock_bits); in set_clock()
45 static void imx8m_clk_enable(struct hantro_dev *vpu, u32 clock_bits) in imx8m_clk_enable() argument50 val |= clock_bits; in imx8m_clk_enable()
282 u32 clock_bits; in set_clock() local285 clock_bits = GPIO_CLOCK_DIR_IN | GPIO_CLOCK_DIR_MASK; in set_clock()287 clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK | in set_clock()290 intel_de_write_notrace(display, bus->gpio_reg, reserved | clock_bits); in set_clock()
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