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Searched refs:ctl2 (Results 1 – 19 of 19) sorted by relevance

/drivers/firmware/cirrus/test/
A Dcs_dsp_test_control_parse.c1022 ctl2 = NULL; in cs_dsp_ctl_parse_fw_name()
1027 ctl2 = walkctl; in cs_dsp_ctl_parse_fw_name()
1031 KUNIT_EXPECT_NOT_NULL(test, ctl2); in cs_dsp_ctl_parse_fw_name()
1042 struct cs_dsp_coeff_ctl *ctl1, *ctl2; in cs_dsp_ctl_alg_id_uniqueness() local
1066 ctl2 = list_next_entry(ctl1, list); in cs_dsp_ctl_alg_id_uniqueness()
1068 KUNIT_EXPECT_NOT_NULL(test, ctl2); in cs_dsp_ctl_alg_id_uniqueness()
1087 struct cs_dsp_coeff_ctl *ctl1, *ctl2; in cs_dsp_ctl_mem_uniqueness() local
1110 ctl2 = list_next_entry(ctl1, list); in cs_dsp_ctl_mem_uniqueness()
1112 KUNIT_EXPECT_NOT_NULL(test, ctl2); in cs_dsp_ctl_mem_uniqueness()
1168 ctl2 = list_next_entry(ctl1, list); in cs_dsp_ctl_fw_uniqueness()
[all …]
/drivers/gpu/drm/i915/display/
A Dintel_backlight.c617 u32 ctl, ctl2, freq; in i965_enable_backlight() local
620 if (ctl2 & BLM_PWM_ENABLE) { in i965_enable_backlight()
624 ctl2 &= ~BLM_PWM_ENABLE; in i965_enable_backlight()
635 ctl2 = BLM_PIPE(pipe); in i965_enable_backlight()
639 ctl2 |= BLM_POLARITY_I965; in i965_enable_backlight()
654 u32 ctl, ctl2; in vlv_enable_backlight() local
661 ctl2 &= ~BLM_PWM_ENABLE; in vlv_enable_backlight()
671 ctl2 = 0; in vlv_enable_backlight()
673 ctl2 |= BLM_POLARITY_I965; in vlv_enable_backlight()
1366 u32 ctl, ctl2; in i965_setup_backlight() local
[all …]
A Ddvo_tfp410.c209 u8 ctl2; in tfp410_detect() local
211 if (tfp410_readb(dvo, TFP410_CTL_2, &ctl2)) { in tfp410_detect()
212 if (ctl2 & TFP410_CTL_2_RSEN) in tfp410_detect()
A Dintel_ddi.c628 u32 ctl2 = 0; in intel_ddi_enable_transcoder_func() local
634 ctl2 |= PORT_SYNC_MODE_ENABLE | in intel_ddi_enable_transcoder_func()
640 ctl2); in intel_ddi_enable_transcoder_func()
3926 u32 ctl2 = intel_de_read(display, in bdw_transcoder_master_readout() local
3929 if ((ctl2 & PORT_SYNC_MODE_ENABLE) == 0) in bdw_transcoder_master_readout()
3932 master_select = REG_FIELD_GET(PORT_SYNC_MODE_MASTER_SELECT_MASK, ctl2); in bdw_transcoder_master_readout()
/drivers/mtd/nand/raw/
A Dcafe_nand.c66 uint32_t ctl2; member
174 cafe_writel(cafe, cafe->ctl2 | 0x100 | command, NAND_CTRL2); in cafe_nand_cmdfunc()
176 cafe->ctl2 &= ~(1<<30); in cafe_nand_cmdfunc()
243 cafe_writel(cafe, cafe->ctl2 | 0x100 | NAND_CMD_RNDOUTSTART, NAND_CTRL2); in cafe_nand_cmdfunc()
245 cafe_writel(cafe, cafe->ctl2 | 0x100 | NAND_CMD_READSTART, NAND_CTRL2); in cafe_nand_cmdfunc()
298 WARN_ON(cafe->ctl2 & (1<<30)); in cafe_nand_cmdfunc()
310 cafe_writel(cafe, cafe->ctl2, NAND_CTRL2); in cafe_nand_cmdfunc()
314 cafe_writel(cafe, cafe->ctl2, NAND_CTRL2); in cafe_nand_cmdfunc()
544 cafe->ctl2 |= (1<<30); in cafe_nand_write_page_lowlevel()
612 cafe->ctl2 = BIT(27); /* Reed-Solomon ECC */ in cafe_nand_attach_chip()
[all …]
/drivers/hwmon/
A Dlm93.c1752 u8 ctl2, ctl4; in pwm_show() local
1755 ctl2 = data->block9[nr][LM93_PWM_CTL2]; in pwm_show()
1771 u8 ctl2, ctl4; in pwm_store() local
1782 ctl2 = (ctl2 & 0x0f) | LM93_PWM_TO_REG(val, (ctl4 & 0x07) ? in pwm_store()
1801 u8 ctl2; in pwm_enable_show() local
1804 ctl2 = data->block9[nr][LM93_PWM_CTL2]; in pwm_enable_show()
1805 if (ctl2 & 0x01) /* manual override enabled ? */ in pwm_enable_show()
1806 rc = ((ctl2 & 0xF0) == 0xF0) ? 0 : 1; in pwm_enable_show()
1819 u8 ctl2; in pwm_enable_store() local
1835 ctl2 |= 0x01; /* enable manual override */ in pwm_enable_store()
[all …]
/drivers/video/fbdev/
A Darcfb.c394 unsigned char ctl2; in arcfb_ioctl() local
396 ctl2 = ks108_readb_ctl2(info->par); in arcfb_ioctl()
397 if (copy_to_user(argp, &ctl2, sizeof(ctl2))) in arcfb_ioctl()
/drivers/net/
A Dsungem_phy.c795 u16 ctl, ctl2; in marvell_setup_forced() local
825 ctl2 = sungem_phy_read(phy, MII_M1011_PHY_SPEC_CONTROL); in marvell_setup_forced()
826 ctl2 &= ~(MII_M1011_PHY_SPEC_CONTROL_MANUAL_MDIX | in marvell_setup_forced()
831 ctl2 |= (fd == DUPLEX_FULL) ? in marvell_setup_forced()
834 sungem_phy_write(phy, MII_1000BASETCONTROL, ctl2); in marvell_setup_forced()
/drivers/pci/pcie/
A Daspm.c641 u32 ctl1 = 0, ctl2 = 0; in aspm_calc_l12_info() local
658 ctl2 |= FIELD_PREP(PCI_L1SS_CTL2_T_PWR_ON_SCALE, scale1) | in aspm_calc_l12_info()
662 ctl2 |= FIELD_PREP(PCI_L1SS_CTL2_T_PWR_ON_SCALE, scale2) | in aspm_calc_l12_info()
690 ctl2 == pctl2 && ctl2 == cctl2) in aspm_calc_l12_info()
707 pci_write_config_dword(parent, parent->l1ss + PCI_L1SS_CTL2, ctl2); in aspm_calc_l12_info()
708 pci_write_config_dword(child, child->l1ss + PCI_L1SS_CTL2, ctl2); in aspm_calc_l12_info()
/drivers/rtc/
A Drtc-rzn1.c318 u32 subu = 0, ctl2; in rzn1_rtc_set_offset() local
352 ret = readl_poll_timeout(rtc->base + RZN1_RTC_CTL2, ctl2, in rzn1_rtc_set_offset()
353 !(ctl2 & RZN1_RTC_CTL2_WUST), 100, 2000000); in rzn1_rtc_set_offset()
/drivers/net/ethernet/aquantia/atlantic/hw_atl/
A Dhw_atl_a0.c455 txd->ctl2 = 0; in hw_atl_a0_hw_ring_tx_xmit()
465 txd->ctl2 |= (buff->mss << 16) | in hw_atl_a0_hw_ring_tx_xmit()
484 txd->ctl2 |= HW_ATL_A0_TXD_CTL2_LEN & (pkt_len << 14); in hw_atl_a0_hw_ring_tx_xmit()
488 txd->ctl2 |= HW_ATL_A0_TXD_CTL2_CTX_EN; in hw_atl_a0_hw_ring_tx_xmit()
A Dhw_atl_b0.c679 txd->ctl2 = 0; in hw_atl_b0_hw_ring_tx_xmit()
690 txd->ctl2 |= (buff->mss << 16); in hw_atl_b0_hw_ring_tx_xmit()
698 txd->ctl2 |= (buff->len_l4 << 8) | in hw_atl_b0_hw_ring_tx_xmit()
715 txd->ctl2 |= HW_ATL_B0_TXD_CTL2_LEN & (pkt_len << 14); in hw_atl_b0_hw_ring_tx_xmit()
719 txd->ctl2 |= HW_ATL_B0_TXD_CTL2_CTX_EN; in hw_atl_b0_hw_ring_tx_xmit()
A Dhw_atl_utils.h21 u32 ctl2; /* 63..46 - payload length, 45 - ctx enable, 44 - ctx index */ member
/drivers/net/wireless/ath/ath9k/
A Dmac.h283 u32 ctl2; member
321 #define ds_ctl2 u.tx.ctl2
/drivers/net/wireless/mediatek/mt76/
A Dmt76x02_mac.h145 u8 ctl2; member
A Dmt76x02_mac.c395 txwi->ctl2 = FIELD_PREP(MT_TX_PWR_ADJ, txpwr_adj); in mt76x02_mac_write_txwi()
/drivers/infiniband/hw/bnxt_re/
A Dqplib_res.c957 u16 ctl2; in bnxt_qplib_determine_atomics() local
967 pcie_capability_read_word(dev, PCI_EXP_DEVCTL2, &ctl2); in bnxt_qplib_determine_atomics()
968 return !(ctl2 & PCI_EXP_DEVCTL2_ATOMIC_REQ); in bnxt_qplib_determine_atomics()
/drivers/net/ethernet/marvell/octeontx2/af/
A Drvu_cpt.c957 u64 ctl, ctl2; in rvu_mbox_handler_cpt_lf_reset() local
970 ctl2 = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in rvu_mbox_handler_cpt_lf_reset()
978 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), ctl2); in rvu_mbox_handler_cpt_lf_reset()
/drivers/pci/
A Dpci.c3877 u32 cap, ctl2; in pci_enable_atomic_ops_to_root() local
3929 &ctl2); in pci_enable_atomic_ops_to_root()
3930 if (ctl2 & PCI_EXP_DEVCTL2_ATOMIC_EGRESS_BLOCK) in pci_enable_atomic_ops_to_root()

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