Searched refs:fbc_ctl (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/i915/display/ |
| A D | intel_fbc.c | 280 u32 fbc_ctl; in i8xx_fbc_ctl() local
290 fbc_ctl = FBC_CTL_PERIODIC | in i8xx_fbc_ctl()
295 fbc_ctl |= FBC_CTL_C3_IDLE; /* 945 needs special SR handling */ in i8xx_fbc_ctl()
298 fbc_ctl |= FBC_CTL_FENCENO(fbc_state->fence_id); in i8xx_fbc_ctl()
300 return fbc_ctl; in i8xx_fbc_ctl()
320 u32 fbc_ctl; in i8xx_fbc_deactivate() local
323 fbc_ctl = intel_de_read(display, FBC_CONTROL); in i8xx_fbc_deactivate()
324 if ((fbc_ctl & FBC_CTL_EN) == 0) in i8xx_fbc_deactivate()
327 fbc_ctl &= ~FBC_CTL_EN; in i8xx_fbc_deactivate()
328 intel_de_write(display, FBC_CONTROL, fbc_ctl); in i8xx_fbc_deactivate()
|
| A D | intel_cursor.c | 666 u32 cntl = 0, base = 0, pos = 0, fbc_ctl = 0; in i9xx_cursor_update_arm() local
676 fbc_ctl = CUR_FBC_EN | CUR_FBC_HEIGHT(height - 1); in i9xx_cursor_update_arm()
711 plane->cursor.size != fbc_ctl || in i9xx_cursor_update_arm()
714 intel_de_write_dsb(display, dsb, CUR_FBC_CTL(display, pipe), fbc_ctl); in i9xx_cursor_update_arm()
720 plane->cursor.size = fbc_ctl; in i9xx_cursor_update_arm()
|
Completed in 10 milliseconds