Home
last modified time | relevance | path

Searched refs:gpu_cc_pll1 (Results 1 – 18 of 18) sorted by relevance

/drivers/clk/qcom/
A Dgpucc-sdm845.c39 static struct clk_alpha_pll gpu_cc_pll1 = { variable
63 { .hw = &gpu_cc_pll1.clkr.hw },
146 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
185 clk_fabia_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sdm845_probe()
A Dgpucc-sc7180.c37 static struct clk_alpha_pll gpu_cc_pll1 = { variable
63 { .hw = &gpu_cc_pll1.clkr.hw },
193 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
237 clk_fabia_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll_config); in gpu_cc_sc7180_probe()
A Dgpucc-qcs615.c98 static struct clk_alpha_pll gpu_cc_pll1 = { variable
138 .hw = &gpu_cc_pll1.clkr.hw,
157 { .hw = &gpu_cc_pll1.clkr.hw },
175 { .hw = &gpu_cc_pll1.clkr.hw },
440 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
459 &gpu_cc_pll1,
A Dgpucc-sm6350.c106 static struct clk_alpha_pll gpu_cc_pll1 = { variable
135 { .hw = &gpu_cc_pll1.clkr.hw },
153 { .hw = &gpu_cc_pll1.clkr.hw },
154 { .hw = &gpu_cc_pll1.clkr.hw },
462 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
504 clk_fabia_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm6350_probe()
A Dgpucc-sc8280xp.c88 static struct clk_alpha_pll gpu_cc_pll1 = { variable
114 { .hw = &gpu_cc_pll1.clkr.hw },
128 { .hw = &gpu_cc_pll1.clkr.hw },
380 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
447 clk_lucid_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sc8280xp_probe()
A Dgpucc-sm8150.c48 static struct clk_alpha_pll gpu_cc_pll1 = { variable
74 { .hw = &gpu_cc_pll1.clkr.hw },
254 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
306 clk_trion_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm8150_probe()
A Dgpucc-sm8250.c51 static struct clk_alpha_pll gpu_cc_pll1 = { variable
77 { .hw = &gpu_cc_pll1.clkr.hw },
262 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
313 clk_lucid_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm8250_probe()
A Dgpucc-sar2130p.c89 static struct clk_alpha_pll gpu_cc_pll1 = { variable
129 { .hw = &gpu_cc_pll1.clkr.hw },
143 { .hw = &gpu_cc_pll1.clkr.hw },
436 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
485 clk_lucid_ole_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sar2130p_probe()
A Dgpucc-sc7280.c64 static struct clk_alpha_pll gpu_cc_pll1 = { variable
92 { .hw = &gpu_cc_pll1.clkr.hw },
106 { .hw = &gpu_cc_pll1.clkr.hw },
432 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
466 clk_lucid_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sc7280_probe()
A Dgpucc-sm6115.c119 static struct clk_alpha_pll gpu_cc_pll1 = { variable
152 &gpu_cc_pll1.clkr.hw,
171 { .hw = &gpu_cc_pll1.clkr.hw },
434 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
482 clk_alpha_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm6115_probe()
A Dgpucc-sm4450.c85 static struct clk_alpha_pll gpu_cc_pll1 = { variable
125 { .hw = &gpu_cc_pll1.clkr.hw },
143 { .hw = &gpu_cc_pll1.clkr.hw },
144 { .hw = &gpu_cc_pll1.clkr.hw },
157 { .hw = &gpu_cc_pll1.clkr.hw },
725 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
783 clk_lucid_evo_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm4450_probe()
A Dgpucc-sm8450.c108 static struct clk_alpha_pll gpu_cc_pll1 = { variable
148 { .hw = &gpu_cc_pll1.clkr.hw },
162 { .hw = &gpu_cc_pll1.clkr.hw },
724 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
785 gpu_cc_pll1.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_LUCID_OLE]; in gpu_cc_sm8450_probe()
788 clk_lucid_ole_pll_configure(&gpu_cc_pll1, regmap, &sm8475_gpu_cc_pll1_config); in gpu_cc_sm8450_probe()
791 clk_lucid_evo_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm8450_probe()
A Dgpucc-x1p42100.c92 static struct clk_alpha_pll gpu_cc_pll1 = { variable
132 { .hw = &gpu_cc_pll1.clkr.hw },
146 { .hw = &gpu_cc_pll1.clkr.hw },
497 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
562 clk_lucid_ole_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_x1p42100_probe()
A Dgpucc-sm8350.c88 static struct clk_alpha_pll gpu_cc_pll1 = { variable
114 { .hw = &gpu_cc_pll1.clkr.hw },
128 { .hw = &gpu_cc_pll1.clkr.hw },
557 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
606 clk_lucid_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm8350_probe()
A Dgpucc-sm8550.c86 static struct clk_alpha_pll gpu_cc_pll1 = { variable
126 { .hw = &gpu_cc_pll1.clkr.hw },
140 { .hw = &gpu_cc_pll1.clkr.hw },
521 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
576 clk_lucid_ole_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm8550_probe()
A Dgpucc-sa8775p.c84 static struct clk_alpha_pll gpu_cc_pll1 = { variable
122 { .hw = &gpu_cc_pll1.clkr.hw },
136 { .hw = &gpu_cc_pll1.clkr.hw },
557 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
647 clk_lucid_evo_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sa8775p_probe()
A Dgpucc-sm8650.c89 static struct clk_alpha_pll gpu_cc_pll1 = { variable
129 { .hw = &gpu_cc_pll1.clkr.hw },
143 { .hw = &gpu_cc_pll1.clkr.hw },
594 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
648 clk_lucid_ole_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm8650_probe()
A Dgpucc-x1e80100.c88 static struct clk_alpha_pll gpu_cc_pll1 = { variable
128 { .hw = &gpu_cc_pll1.clkr.hw },
142 { .hw = &gpu_cc_pll1.clkr.hw },
582 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
638 clk_lucid_evo_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_x1e80100_probe()

Completed in 36 milliseconds