Searched refs:hsplit_pipe (Results 1 – 5 of 5) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| A D | dcn_calcs.c | 1248 if (hsplit_pipe && hsplit_pipe->plane_state == pipe->plane_state) { in dcn_validate_bandwidth()
1262 ASSERT(hsplit_pipe); in dcn_validate_bandwidth()
1267 } else if (hsplit_pipe && hsplit_pipe->plane_state == pipe->plane_state) { in dcn_validate_bandwidth()
1270 if (hsplit_pipe->bottom_pipe) in dcn_validate_bandwidth()
1271 hsplit_pipe->bottom_pipe->top_pipe = pipe; in dcn_validate_bandwidth()
1272 hsplit_pipe->plane_state = NULL; in dcn_validate_bandwidth()
1273 hsplit_pipe->stream = NULL; in dcn_validate_bandwidth()
1274 hsplit_pipe->top_pipe = NULL; in dcn_validate_bandwidth()
1275 hsplit_pipe->bottom_pipe = NULL; in dcn_validate_bandwidth()
1277 memset(&hsplit_pipe->plane_res, 0, sizeof(hsplit_pipe->plane_res)); in dcn_validate_bandwidth()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| A D | dcn20_resource.c | 1796 if (!hsplit_pipe || hsplit_pipe->plane_state != pipe->plane_state) in dcn20_merge_pipes_for_validate()
1808 memset(&hsplit_pipe->plane_res, 0, sizeof(hsplit_pipe->plane_res)); in dcn20_merge_pipes_for_validate()
1809 memset(&hsplit_pipe->stream_res, 0, sizeof(hsplit_pipe->stream_res)); in dcn20_merge_pipes_for_validate()
2056 ASSERT(hsplit_pipe); in dcn20_fast_validate_bw()
2059 pipe, hsplit_pipe)) in dcn20_fast_validate_bw()
2072 if (hsplit_pipe && hsplit_pipe->plane_state != pipe->plane_state in dcn20_fast_validate_bw()
2077 if (!hsplit_pipe || hsplit_pipe->plane_state != pipe->plane_state) { in dcn20_fast_validate_bw()
2080 ASSERT(hsplit_pipe); in dcn20_fast_validate_bw()
2081 if (!hsplit_pipe) { in dcn20_fast_validate_bw()
2090 pipe, hsplit_pipe)) in dcn20_fast_validate_bw()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| A D | dcn21_resource.c | 847 struct pipe_ctx *hsplit_pipe = pipe->bottom_pipe; in dcn21_fast_validate_bw() local
856 ASSERT(hsplit_pipe); in dcn21_fast_validate_bw()
859 pipe, hsplit_pipe)) in dcn21_fast_validate_bw()
861 pipe_split_from[hsplit_pipe->pipe_idx] = pipe_idx; in dcn21_fast_validate_bw()
872 if (!hsplit_pipe || hsplit_pipe->plane_state != pipe->plane_state) { in dcn21_fast_validate_bw()
875 ASSERT(hsplit_pipe); in dcn21_fast_validate_bw()
876 if (!hsplit_pipe) { in dcn21_fast_validate_bw()
885 pipe, hsplit_pipe)) in dcn21_fast_validate_bw()
891 pipe, hsplit_pipe); in dcn21_fast_validate_bw()
893 resource_build_scaling_params(hsplit_pipe); in dcn21_fast_validate_bw()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| A D | dcn30_resource.c | 1769 struct pipe_ctx *hsplit_pipe = NULL; in dcn30_internal_validate_bw() local
1796 hsplit_pipe = dcn30_find_split_pipe(dc, context, old_index); in dcn30_internal_validate_bw()
1797 ASSERT(hsplit_pipe); in dcn30_internal_validate_bw()
1798 if (!hsplit_pipe) in dcn30_internal_validate_bw()
1803 pipe, hsplit_pipe, odm)) in dcn30_internal_validate_bw()
1806 newly_split[hsplit_pipe->pipe_idx] = true; in dcn30_internal_validate_bw()
1844 hsplit_pipe, pipe_4to1, odm)) in dcn30_internal_validate_bw()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | dcn32_fpu.c | 2035 struct pipe_ctx *hsplit_pipe = NULL; in dcn32_apply_merge_split_flags_helper() local
2062 hsplit_pipe = dcn32_find_split_pipe(dc, context, old_index); in dcn32_apply_merge_split_flags_helper()
2063 ASSERT(hsplit_pipe); in dcn32_apply_merge_split_flags_helper()
2064 if (!hsplit_pipe) in dcn32_apply_merge_split_flags_helper()
2069 pipe, hsplit_pipe, odm)) in dcn32_apply_merge_split_flags_helper()
2072 newly_split[hsplit_pipe->pipe_idx] = true; in dcn32_apply_merge_split_flags_helper()
2110 hsplit_pipe, pipe_4to1, odm)) in dcn32_apply_merge_split_flags_helper()
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