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Searched refs:intel_de_write_fw (Results 1 – 15 of 15) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dintel_sprite.c111 intel_de_write_fw(display, SPCSCC01(plane_id), in chv_sprite_update_csc()
113 intel_de_write_fw(display, SPCSCC23(plane_id), in chv_sprite_update_csc()
115 intel_de_write_fw(display, SPCSCC45(plane_id), in chv_sprite_update_csc()
117 intel_de_write_fw(display, SPCSCC67(plane_id), in chv_sprite_update_csc()
814 intel_de_write_fw(display, SPRSTRIDE(pipe), in ivb_sprite_update_noarm()
816 intel_de_write_fw(display, SPRPOS(pipe), in ivb_sprite_update_noarm()
818 intel_de_write_fw(display, SPRSIZE(pipe), in ivb_sprite_update_noarm()
866 intel_de_write_fw(display, SPRSURF(pipe), in ivb_sprite_update_arm()
1168 intel_de_write_fw(display, DVSPOS(pipe), in g4x_sprite_update_noarm()
1170 intel_de_write_fw(display, DVSSIZE(pipe), in g4x_sprite_update_noarm()
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A Dintel_gmbus.c394 intel_de_write_fw(display, GMBUS4(display), 0); in gmbus_wait()
420 intel_de_write_fw(display, GMBUS4(display), 0); in gmbus_wait_idle()
451 intel_de_write_fw(display, GMBUS0(display), in gmbus_xfer_read_chunk()
455 intel_de_write_fw(display, GMBUS1(display), in gmbus_xfer_read_chunk()
533 intel_de_write_fw(display, GMBUS3(display), val); in gmbus_xfer_write_chunk()
534 intel_de_write_fw(display, GMBUS1(display), in gmbus_xfer_write_chunk()
619 intel_de_write_fw(display, GMBUS5(display), 0); in gmbus_index_xfer()
680 intel_de_write_fw(display, GMBUS0(display), 0); in do_gmbus_xfer()
711 intel_de_write_fw(display, GMBUS1(display), 0); in do_gmbus_xfer()
712 intel_de_write_fw(display, GMBUS0(display), 0); in do_gmbus_xfer()
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A Di9xx_plane.c436 intel_de_write_fw(display, DSPSTRIDE(display, i9xx_plane), in i9xx_plane_update_noarm()
450 intel_de_write_fw(display, DSPPOS(display, i9xx_plane), in i9xx_plane_update_noarm()
452 intel_de_write_fw(display, DSPSIZE(display, i9xx_plane), in i9xx_plane_update_noarm()
488 intel_de_write_fw(display, PRIMPOS(display, i9xx_plane), in i9xx_plane_update_arm()
490 intel_de_write_fw(display, PRIMSIZE(display, i9xx_plane), in i9xx_plane_update_arm()
492 intel_de_write_fw(display, in i9xx_plane_update_arm()
497 intel_de_write_fw(display, DSPOFFSET(display, i9xx_plane), in i9xx_plane_update_arm()
500 intel_de_write_fw(display, DSPLINOFF(display, i9xx_plane), in i9xx_plane_update_arm()
514 intel_de_write_fw(display, DSPSURF(display, i9xx_plane), in i9xx_plane_update_arm()
517 intel_de_write_fw(display, DSPADDR(display, i9xx_plane), in i9xx_plane_update_arm()
[all …]
A Dintel_sbi.c29 intel_de_write_fw(display, SBI_ADDR, SBI_ADDR_VALUE(reg)); in intel_sbi_rw()
30 intel_de_write_fw(display, SBI_DATA, is_read ? 0 : *val); in intel_sbi_rw()
38 intel_de_write_fw(display, SBI_CTL_STAT, cmd | SBI_STATUS_BUSY); in intel_sbi_rw()
A Dintel_dsb.c850 intel_de_write_fw(display, DSB_CTRL(pipe, dsb->id), in intel_dsb_commit()
853 intel_de_write_fw(display, DSB_CHICKEN(pipe, dsb->id), in intel_dsb_commit()
856 intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb->id), in intel_dsb_commit()
860 intel_de_write_fw(display, DSB_PMCTRL(pipe, dsb->id), 0); in intel_dsb_commit()
862 intel_de_write_fw(display, DSB_HEAD(pipe, dsb->id), in intel_dsb_commit()
865 intel_de_write_fw(display, DSB_TAIL(pipe, dsb->id), in intel_dsb_commit()
878 intel_de_write_fw(display, DSB_CTRL(pipe, dsb->id), in intel_dsb_wait()
897 intel_de_write_fw(display, DSB_CTRL(pipe, dsb->id), 0); in intel_dsb_wait()
899 intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb->id), in intel_dsb_wait()
987 intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb_id), tmp); in intel_dsb_irq_handler()
A Dintel_color.c1270 intel_de_write_fw(display, in i9xx_load_lut_10()
1273 intel_de_write_fw(display, in i9xx_load_lut_10()
1306 intel_de_write_fw(display, in i965_load_lut_10p6()
1309 intel_de_write_fw(display, in i965_load_lut_10p6()
1345 intel_de_write_fw(display, reg, val); in ilk_lut_write()
1356 intel_de_write_fw(display, reg, val); in ilk_lut_write_indexed()
3594 intel_de_write_fw(display, PREC_PAL_INDEX(pipe), in ivb_read_lut_10()
3601 intel_de_write_fw(display, PREC_PAL_INDEX(pipe), in ivb_read_lut_10()
3656 intel_de_write_fw(display, PREC_PAL_INDEX(pipe), in bdw_read_lut_10()
3658 intel_de_write_fw(display, PREC_PAL_INDEX(pipe), in bdw_read_lut_10()
[all …]
A Dintel_pfit.c579 intel_de_write_fw(display, PF_CTL(pipe), PF_ENABLE | in ilk_pfit_enable()
582 intel_de_write_fw(display, PF_CTL(pipe), PF_ENABLE | in ilk_pfit_enable()
584 intel_de_write_fw(display, PF_WIN_POS(pipe), in ilk_pfit_enable()
586 intel_de_write_fw(display, PF_WIN_SZ(pipe), in ilk_pfit_enable()
603 intel_de_write_fw(display, PF_CTL(pipe), 0); in ilk_pfit_disable()
604 intel_de_write_fw(display, PF_WIN_POS(pipe), 0); in ilk_pfit_disable()
605 intel_de_write_fw(display, PF_WIN_SZ(pipe), 0); in ilk_pfit_disable()
A Dintel_de.h211 intel_de_write_fw(struct intel_display *display, i915_reg_t reg, u32 val) in intel_de_write_fw() function
236 intel_de_write_fw(display, reg, val); in intel_de_write_dsb()
A Dskl_scaler.c770 intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl); in skl_pfit_enable()
772 intel_de_write_fw(display, SKL_PS_VPHASE(pipe, id), in skl_pfit_enable()
774 intel_de_write_fw(display, SKL_PS_HPHASE(pipe, id), in skl_pfit_enable()
776 intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id), in skl_pfit_enable()
778 intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id), in skl_pfit_enable()
A Dintel_cursor.c310 intel_de_write_fw(display, CURCNTR(display, PIPE_A), 0); in i845_cursor_update_arm()
311 intel_de_write_fw(display, CURBASE(display, PIPE_A), base); in i845_cursor_update_arm()
312 intel_de_write_fw(display, CURSIZE(display, PIPE_A), size); in i845_cursor_update_arm()
313 intel_de_write_fw(display, CURPOS(display, PIPE_A), pos); in i845_cursor_update_arm()
314 intel_de_write_fw(display, CURCNTR(display, PIPE_A), cntl); in i845_cursor_update_arm()
320 intel_de_write_fw(display, CURPOS(display, PIPE_A), pos); in i845_cursor_update_arm()
A Di9xx_wm.c1903 intel_de_write_fw(display, DSPARB(display), dsparb); in vlv_atomic_update_fifo()
1904 intel_de_write_fw(display, DSPARB2, dsparb2); in vlv_atomic_update_fifo()
1920 intel_de_write_fw(display, DSPARB(display), dsparb); in vlv_atomic_update_fifo()
1921 intel_de_write_fw(display, DSPARB2, dsparb2); in vlv_atomic_update_fifo()
1937 intel_de_write_fw(display, DSPARB3, dsparb3); in vlv_atomic_update_fifo()
1938 intel_de_write_fw(display, DSPARB2, dsparb2); in vlv_atomic_update_fifo()
A Dintel_fbc.c376 intel_de_write_fw(display, DSPADDR(display, i9xx_plane), in i8xx_fbc_nuke()
414 intel_de_write_fw(display, DSPSURF(display, i9xx_plane), in i965_fbc_nuke()
A Dskl_universal_plane.c2811 intel_de_write_fw(display, PLANE_STRIDE(plane->pipe, plane->id), in skl_disable_tiling()
2814 intel_de_write_fw(display, PLANE_CTL(plane->pipe, plane->id), plane_ctl); in skl_disable_tiling()
2816 intel_de_write_fw(display, PLANE_SURF(plane->pipe, plane->id), in skl_disable_tiling()
A Dintel_dmc.c606 intel_de_write_fw(display, in dmc_load_program()
A Dintel_psr.c2903 intel_de_write_fw(display, PSR2_MAN_TRK_CTL(display, cpu_transcoder), val); in intel_psr2_panic_force_full_update()
2908 intel_de_write_fw(display, PIPE_SRCSZ_ERLY_TPT(crtc->pipe), 0); in intel_psr2_panic_force_full_update()

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