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Searched refs:interlaced (Results 1 – 25 of 94) sorted by relevance

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/drivers/media/v4l2-core/
A Dv4l2-dv-timings.c168 if (!bt->interlaced && in v4l2_valid_dv_timings()
275 t1->bt.interlaced == t2->bt.interlaced && in v4l2_match_dv_timings()
288 (!t1->bt.interlaced || in v4l2_match_dv_timings()
309 if (bt->interlaced) in v4l2_print_dv_timings()
333 if (bt->interlaced) in v4l2_print_dv_timings()
496 bool interlaced, in v4l2_detect_cvt() argument
554 if (interlaced) in v4l2_detect_cvt()
641 if (!interlaced) { in v4l2_detect_cvt()
719 bool interlaced, in v4l2_detect_gtf() argument
747 if (interlaced) in v4l2_detect_gtf()
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/drivers/media/platform/amphion/
A Dvpu_helpers.c152 u32 stride, u32 interlaced, u32 *pbl) in get_nv12_plane_size() argument
173 u32 stride, u32 interlaced, u32 *pbl) in get_tiled_8l128_plane_size() argument
181 if (interlaced) in get_tiled_8l128_plane_size()
202 u32 stride, u32 interlaced, u32 *pbl) in get_default_plane_size() argument
220 u32 stride, u32 interlaced, u32 *pbl) in vpu_helper_get_plane_size() argument
225 return get_nv12_plane_size(w, h, plane_no, stride, interlaced, pbl); in vpu_helper_get_plane_size()
230 return get_tiled_8l128_plane_size(fmt, w, h, plane_no, stride, interlaced, pbl); in vpu_helper_get_plane_size()
232 return get_default_plane_size(w, h, plane_no, stride, interlaced, pbl); in vpu_helper_get_plane_size()
/drivers/gpu/drm/
A Ddrm_modes.c659 if (interlaced) in drm_cvt_mode()
677 if (interlaced) in drm_cvt_mode()
690 if (interlaced) in drm_cvt_mode()
810 if (interlaced) { in drm_cvt_mode()
901 if (interlaced) in drm_gtf_mode_complex()
907 if (interlaced) in drm_gtf_mode_complex()
921 if (interlaced) in drm_gtf_mode_complex()
951 if (interlaced) in drm_gtf_mode_complex()
1004 if (interlaced) { in drm_gtf_mode_complex()
1058 interlaced, margins, in drm_gtf_mode()
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/drivers/gpu/ipu-v3/
A Dipu-dc.c160 int ipu_dc_init_sync(struct ipu_dc *dc, struct ipu_di *di, bool interlaced, in ipu_dc_init_sync() argument
183 sync = interlaced ? 6 : 5; in ipu_dc_init_sync()
191 if (interlaced) { in ipu_dc_init_sync()
218 if (interlaced) in ipu_dc_init_sync()
/drivers/media/platform/renesas/vsp1/
A Dvsp1_rpf.c78 if (pipe->interlaced) in rpf_configure_stream()
195 if (pipe->interlaced) in rpf_configure_stream()
334 if (pipe->interlaced) { in rpf_configure_partition()
371 if (pipe->interlaced) { in rpf_configure_partition()
/drivers/video/fbdev/matrox/
A Dmatroxfb_crtc2.h30 unsigned int interlaced:1; member
A Dmatroxfb_crtc2.c105 if (mt->interlaced) { in matroxfb_dh_restore()
129 m2info->interlaced = 1; in matroxfb_dh_restore()
132 m2info->interlaced = 0; in matroxfb_dh_restore()
181 if (m2info->interlaced) { in matroxfb_dh_pan_var()
/drivers/media/i2c/adv748x/
A Dadv748x-hdmi.c96 fmt->field = hdmi->timings.bt.interlaced ? in adv748x_hdmi_fill_format()
245 timings->bt.interlaced ? in adv748x_hdmi_s_dv_timings()
306 bt->interlaced = hdmi_read(state, ADV748X_HDMI_F1H1) & in adv748x_hdmi_query_dv_timings()
330 if (bt->interlaced == V4L2_DV_INTERLACED) { in adv748x_hdmi_query_dv_timings()
/drivers/gpu/drm/exynos/
A Dexynos5433_drm_decon.c200 bool interlaced = false; in decon_commit() local
209 interlaced = true; in decon_commit()
216 if (interlaced) in decon_commit()
226 if (interlaced) in decon_commit()
238 if (interlaced) in decon_commit()
/drivers/gpu/drm/armada/
A Darmada_crtc.c260 if (stat & GRA_FRAME_IRQ && dcrtc->interlaced) { in armada_drm_crtc_irq()
338 bool interlaced = !!(adj->flags & DRM_MODE_FLAG_INTERLACE); in armada_drm_crtc_mode_set_nofb() local
357 dcrtc->interlaced = interlaced; in armada_drm_crtc_mode_set_nofb()
365 if (interlaced) { in armada_drm_crtc_mode_set_nofb()
640 if (dcrtc->interlaced) { in armada_drm_crtc_cursor_update()
A Darmada_plane.h23 u16 pitches[3], bool interlaced);
/drivers/gpu/drm/amd/display/dc/dml/
A Ddml1_display_rq_dlg_calc.c1013 bool interlaced = e2e_pipe_param->pipe.dest.interlaced; in dml1_rq_dlg_get_dlg_params() local
1148 DTRACE("DLG: %s: interlaced = %d", __func__, interlaced); in dml1_rq_dlg_get_dlg_params()
1159 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; /* 15 bits */ in dml1_rq_dlg_get_dlg_params()
1172 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml1_rq_dlg_get_dlg_params()
1253 if (interlaced) in dml1_rq_dlg_get_dlg_params()
1365 max_vinit_l = interlaced ? dml_max(vinit_l, vinit_bot_l) : vinit_l; in dml1_rq_dlg_get_dlg_params()
1366 max_vinit_c = interlaced ? dml_max(vinit_c, vinit_bot_c) : vinit_c; in dml1_rq_dlg_get_dlg_params()
/drivers/gpu/drm/sun4i/
A Dsun8i_mixer.c374 bool interlaced; in sun8i_mixer_mode_set() local
378 interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); in sun8i_mixer_mode_set()
391 if (interlaced) in sun8i_mixer_mode_set()
400 interlaced ? "on" : "off"); in sun8i_mixer_mode_set()
/drivers/gpu/drm/renesas/rcar-du/
A Drcar_du_plane.c336 bool interlaced; in rcar_du_plane_setup_scanout() local
339 interlaced = state->state.crtc->state->adjusted_mode.flags in rcar_du_plane_setup_scanout()
367 (interlaced && state->format->bpp == 32) ? in rcar_du_plane_setup_scanout()
385 (!interlaced && state->format->bpp == 32 ? 2 : 1)); in rcar_du_plane_setup_scanout()
A Drcar_du_crtc.c596 bool interlaced; in rcar_du_crtc_start() local
603 interlaced = rcrtc->crtc.mode.flags & DRM_MODE_FLAG_INTERLACE; in rcar_du_crtc_start()
605 (interlaced ? DSYSR_SCM_INT_VIDEO : 0) | in rcar_du_crtc_start()
870 bool interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE; in rcar_du_crtc_mode_valid() local
874 if (interlaced && !rcar_du_has(rcdu, RCAR_DU_FEATURE_INTERLACED)) in rcar_du_crtc_mode_valid()
889 vbp = (mode->vtotal - mode->vsync_end) / (interlaced ? 2 : 1); in rcar_du_crtc_mode_valid()
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddisplay_rq_dlg_calc_20.c809 bool interlaced = dst->interlaced; in dml20_rq_dlg_get_dlg_params() local
917 dml_print("DML_DLG: %s: interlaced = %d\n", __func__, interlaced); in dml20_rq_dlg_get_dlg_params()
924 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml20_rq_dlg_get_dlg_params()
934 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml20_rq_dlg_get_dlg_params()
1027 if (interlaced) { in dml20_rq_dlg_get_dlg_params()
1044 if (interlaced) in dml20_rq_dlg_get_dlg_params()
A Ddisplay_rq_dlg_calc_20v2.c809 bool interlaced = dst->interlaced; in dml20v2_rq_dlg_get_dlg_params() local
917 dml_print("DML_DLG: %s: interlaced = %d\n", __func__, interlaced); in dml20v2_rq_dlg_get_dlg_params()
924 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml20v2_rq_dlg_get_dlg_params()
934 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml20v2_rq_dlg_get_dlg_params()
1028 if (interlaced) { in dml20v2_rq_dlg_get_dlg_params()
1045 if (interlaced) in dml20v2_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn21/
A Ddisplay_rq_dlg_calc_21.c855 bool interlaced = dst->interlaced; in dml_rq_dlg_get_dlg_params() local
963 dml_print("DML_DLG: %s: interlaced = %d\n", __func__, interlaced); in dml_rq_dlg_get_dlg_params()
970 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml_rq_dlg_get_dlg_params()
980 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml_rq_dlg_get_dlg_params()
1067 if (interlaced) { in dml_rq_dlg_get_dlg_params()
1084 if (interlaced) in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/imx/ipuv3/
A Dipuv3-plane.h42 uint32_t src_h, bool interlaced);
/drivers/media/platform/synopsys/hdmirx/
A Dsnps_hdmirx.c308 bt->width, bt->height, bt->interlaced ? "i" : "p", in hdmirx_get_timings()
316 if (bt->interlaced == V4L2_DV_INTERLACED) { in hdmirx_get_timings()
408 bt->interlaced = V4L2_DV_INTERLACED; in hdmirx_get_detected_timings()
410 bt->interlaced = V4L2_DV_PROGRESSIVE; in hdmirx_get_detected_timings()
429 bt->interlaced, hdmirx_dev->pix_fmt, in hdmirx_get_detected_timings()
1215 if (bt->interlaced == V4L2_DV_INTERLACED) in hdmirx_set_fmt()
1579 if (bt->interlaced == V4L2_DV_INTERLACED) in hdmirx_start_streaming()
1943 if (bt->interlaced != V4L2_DV_INTERLACED || in dma_idle_int_handler()
1953 if (bt->interlaced) in dma_idle_int_handler()
2002 if (bt->interlaced != V4L2_DV_INTERLACED || in line_flag_int_handler()
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/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddisplay_rq_dlg_calc_32.c233 bool interlaced = dst->interlaced; in dml32_rq_dlg_get_dlg_reg() local
272 dml_print("DML_DLG: %s: interlaced = %d\n", __func__, interlaced); in dml32_rq_dlg_get_dlg_reg()
277 dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml32_rq_dlg_get_dlg_reg()
/drivers/gpu/drm/amd/display/include/
A Daudio_types.h56 bool interlaced; member
/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddisplay_rq_dlg_calc_30.c921 bool interlaced = dst->interlaced; in dml_rq_dlg_get_dlg_params() local
1034 dml_print("DML_DLG: %s: interlaced = %d\n", __func__, interlaced); in dml_rq_dlg_get_dlg_params()
1041 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml_rq_dlg_get_dlg_params()
1048 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml_rq_dlg_get_dlg_params()
1128 if (interlaced) { in dml_rq_dlg_get_dlg_params()
1145 if (interlaced) in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddisplay_rq_dlg_calc_31.c881 bool interlaced = dst->interlaced; in dml_rq_dlg_get_dlg_params() local
973 …dml_print("DML_DLG: %s: interlaced = %d\n", __func__, interlaced); ASSERT(ref_freq_to_… in dml_rq_dlg_get_dlg_params()
977 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml_rq_dlg_get_dlg_params()
982 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml_rq_dlg_get_dlg_params()
1027 if (interlaced) { in dml_rq_dlg_get_dlg_params()
1043 if (interlaced) in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/rockchip/
A Dcdn-dp-core.h44 bool interlaced; member

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