Home
last modified time | relevance | path

Searched refs:reset_method (Results 1 – 19 of 19) sorted by relevance

/drivers/net/ethernet/mellanox/mlx5/core/
A Dfw_reset.c29 u8 reset_method; member
100 u8 *reset_type, u8 *reset_state, u8 *reset_method) in mlx5_reg_mfrl_query() argument
116 if (reset_method) in mlx5_reg_mfrl_query()
117 *reset_method = MLX5_GET(mfrl_reg, out, pci_reset_req_method); in mlx5_reg_mfrl_query()
128 u8 *reset_method) in mlx5_fw_reset_get_reset_method() argument
131 *reset_method = MLX5_MFRL_REG_PCI_RESET_METHOD_LINK_TOGGLE; in mlx5_fw_reset_get_reset_method()
135 return mlx5_reg_mfrl_query(dev, NULL, NULL, NULL, reset_method); in mlx5_fw_reset_get_reset_method()
415 u8 reset_method) in mlx5_is_reset_now_capable() argument
571 switch (reset_method) { in mlx5_sync_pci_reset()
607 err = mlx5_sync_pci_reset(dev, fw_reset->reset_method); in mlx5_sync_reset_now_event()
[all …]
/drivers/gpu/drm/amd/amdgpu/
A Dsienna_cichlid.c55 if (handler->reset_method == reset_context->method) in sienna_cichlid_get_reset_handler()
62 if (handler->reset_method == AMD_RESET_METHOD_MODE2) in sienna_cichlid_get_reset_handler()
119 if (handler->reset_method == reset_ctl->active_reset) { in sienna_cichlid_async_reset()
258 .reset_method = AMD_RESET_METHOD_MODE2,
A Dsmu_v13_0_10.c51 if (handler->reset_method == reset_context->method) in smu_v13_0_10_get_reset_handler()
59 if (handler->reset_method == AMD_RESET_METHOD_MODE2) in smu_v13_0_10_get_reset_handler()
118 if (handler->reset_method == reset_ctl->active_reset) { in smu_v13_0_10_async_reset()
255 .reset_method = AMD_RESET_METHOD_MODE2,
A Daldebaran.c64 if (handler->reset_method == reset_context->method) in aldebaran_get_reset_handler()
131 if (handler->reset_method == reset_ctl->active_reset) { in aldebaran_async_reset()
427 .reset_method = AMD_RESET_METHOD_MODE2,
A Damdgpu_reset.h59 enum amd_reset_method reset_method; member
A Damdgpu_reset.c170 .reset_method = AMD_RESET_METHOD_ON_INIT,
A Dsoc15.c907 .reset_method = &soc15_asic_reset_method,
928 .reset_method = &soc15_asic_reset_method,
949 .reset_method = &soc15_asic_reset_method,
A Dsoc24.c352 .reset_method = &soc24_asic_reset_method,
A Damdgpu.h664 enum amd_reset_method (*reset_method)(struct amdgpu_device *adev); member
1511 #define amdgpu_asic_reset_method(adev) (adev)->asic_funcs->reset_method((adev))
A Damdgpu_drv.c970 MODULE_PARM_DESC(reset_method, "GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = m…
971 module_param_named_unsafe(reset_method, amdgpu_reset_method, int, 0644);
A Dsoc21.c539 .reset_method = &soc21_asic_reset_method,
A Dnv.c623 .reset_method = &nv_asic_reset_method,
A Damdgpu_device.c6061 enum amd_reset_method reset_method; in amdgpu_device_suspend_display_audio() local
6069 reset_method = amdgpu_asic_reset_method(adev); in amdgpu_device_suspend_display_audio()
6070 if ((reset_method != AMD_RESET_METHOD_BACO) && in amdgpu_device_suspend_display_audio()
6071 (reset_method != AMD_RESET_METHOD_MODE1)) in amdgpu_device_suspend_display_audio()
A Dcik.c1970 .reset_method = &cik_asic_reset_method,
A Dvi.c1438 .reset_method = &vi_asic_reset_method,
A Dsi.c2015 .reset_method = &si_asic_reset_method,
/drivers/net/ethernet/sfc/siena/
A Dsiena.c102 enum reset_type reset_method = RESET_TYPE_ALL; in siena_test_chip() local
105 efx_siena_reset_down(efx, reset_method); in siena_test_chip()
110 rc = efx_siena_mcdi_reset(efx, reset_method); in siena_test_chip()
119 rc = efx_siena_mcdi_reset(efx, reset_method); in siena_test_chip()
121 rc2 = efx_siena_reset_up(efx, reset_method, rc == 0); in siena_test_chip()
/drivers/net/ethernet/sfc/falcon/
A Dfalcon.c1899 enum reset_type reset_method = RESET_TYPE_INVISIBLE; in falcon_b0_test_chip() local
1914 ef4_reset_down(efx, reset_method); in falcon_b0_test_chip()
1921 rc = falcon_reset_hw(efx, reset_method); in falcon_b0_test_chip()
1922 rc2 = ef4_reset_up(efx, reset_method, rc == 0); in falcon_b0_test_chip()
/drivers/pci/
A Dpci-sysfs.c1527 static DEVICE_ATTR_RW(reset_method);

Completed in 815 milliseconds