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Searched refs:smnCPM_CONTROL (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
A Dnbio_v2_3.c34 #define smnCPM_CONTROL 0x11180460 macro
236 def = data = RREG32_PCIE(smnCPM_CONTROL); in nbio_v2_3_update_medium_grain_clock_gating()
254 WREG32_PCIE(smnCPM_CONTROL, data); in nbio_v2_3_update_medium_grain_clock_gating()
286 data = RREG32_PCIE(smnCPM_CONTROL); in nbio_v2_3_get_clockgating_state()
A Dnbio_v6_1.c168 def = data = RREG32_PCIE(smnCPM_CONTROL); in nbio_v6_1_update_medium_grain_clock_gating()
188 WREG32_PCIE(smnCPM_CONTROL, data); in nbio_v6_1_update_medium_grain_clock_gating()
217 data = RREG32_PCIE(smnCPM_CONTROL); in nbio_v6_1_get_clockgating_state()
A Dnbio_v7_0.c212 data = RREG32_PCIE(smnCPM_CONTROL); in nbio_v7_0_get_clockgating_state()
A Dnbio_v7_4.c280 data = RREG32_PCIE(smnCPM_CONTROL); in nbio_v7_4_get_clockgating_state()
/drivers/gpu/drm/amd/include/asic_reg/nbio/
A Dnbio_6_1_smn.h26 #define smnCPM_CONTROL 0x11180460 macro
A Dnbio_7_4_0_smn.h30 #define smnCPM_CONTROL 0x11180460 macro
A Dnbio_7_0_smn.h26 #define smnCPM_CONTROL 0x11180460 macro

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