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Searched refs:src_h (Results 1 – 25 of 97) sorted by relevance

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/drivers/media/platform/ti/vpe/
A Dsc.c119 if (dst_h > src_h) { in sc_set_vs_coeffs()
121 } else if (dst_h == src_h) { in sc_set_vs_coeffs()
124 sixteenths = (dst_h << 4) / src_h; in sc_set_vs_coeffs()
148 u32 *sc_reg17, unsigned int src_w, unsigned int src_h, in sc_config_scaler() argument
178 if (src_w == dst_w && src_h == dst_h) { in sc_config_scaler()
213 if (dst_h < (src_h >> 2)) { in sc_config_scaler()
222 factor = (u16) ((dst_h << 10) / src_h); in sc_config_scaler()
238 src_h, dst_h, factor, row_acc_init_rav, in sc_config_scaler()
242 row_acc_inc = ((src_h - 1) << 16) / (dst_h - 1); in sc_config_scaler()
247 src_h, dst_h, row_acc_inc); in sc_config_scaler()
[all …]
/drivers/media/pci/ivtv/
A Divtv-yuv.c497 if (f->src_h == f->dst_h) { in ivtv_yuv_handle_vertical()
536 if (f->src_h == f->dst_h) { in ivtv_yuv_handle_vertical()
566 if (f->src_h == f->dst_h) { in ivtv_yuv_handle_vertical()
688 f->src_h = (f->src_h - osd_crop) & ~3; in ivtv_yuv_window_setup()
689 f->dst_h = f->src_h / 4; in ivtv_yuv_window_setup()
757 f->src_h += f->src_y & 1; in ivtv_yuv_window_setup()
760 f->src_h &= ~1; in ivtv_yuv_window_setup()
772 f->src_h &= ~3; in ivtv_yuv_window_setup()
773 f->dst_h = f->src_h / 4; in ivtv_yuv_window_setup()
790 if ((of->src_h != f->src_h) || (of->dst_h != f->dst_h) || in ivtv_yuv_window_setup()
[all …]
/drivers/gpu/drm/msm/disp/mdp4/
A Dmdp4_plane.c48 uint32_t src_w, uint32_t src_h);
122 new_state->src_w, new_state->src_h); in mdp4_plane_atomic_update()
193 uint32_t src_w, uint32_t src_h) in mdp4_plane_mode_set() argument
216 src_h = src_h >> 16; in mdp4_plane_mode_set()
229 if (src_h > (crtc_h * DOWN_SCALE_MAX)) { in mdp4_plane_mode_set()
239 if (crtc_h > (src_h * UP_SCALE_MAX)) { in mdp4_plane_mode_set()
260 if (src_h != crtc_h) { in mdp4_plane_mode_set()
266 if (crtc_h > src_h) in mdp4_plane_mode_set()
268 else if (crtc_h <= (src_h / 4)) in mdp4_plane_mode_set()
273 src_h, crtc_h); in mdp4_plane_mode_set()
[all …]
/drivers/gpu/drm/armada/
A Darmada_trace.h34 uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h),
35 TP_ARGS(plane, crtc, fb, crtc_x, crtc_y, crtc_w, crtc_h, src_x, src_y, src_w, src_h),
47 __field(u32, src_h)
60 __entry->src_h = src_h;
67 __entry->src_w >> 16, __entry->src_h >> 16)
/drivers/gpu/drm/sti/
A Dsti_hqvdp.c482 int src_w, src_h, dst_w, dst_h; in hqvdp_dbg_dump_cmd() local
542 if (dst_h > src_h) in hqvdp_dbg_dump_cmd()
736 int src_w, int src_h, in sti_hqvdp_check_hw_scaling() argument
1033 int src_x, src_y, src_w, src_h; in sti_hqvdp_atomic_check() local
1052 src_h = new_plane_state->src_h >> 16; in sti_hqvdp_atomic_check()
1055 src_w, src_h, in sti_hqvdp_atomic_check()
1074 (src_h > MAX_HEIGHT) || (src_h < MIN_HEIGHT) || in sti_hqvdp_atomic_check()
1078 src_w, src_h, in sti_hqvdp_atomic_check()
1129 int src_x, src_y, src_w, src_h; in sti_hqvdp_atomic_update() local
1146 (oldstate->src_h == newstate->src_h)) { in sti_hqvdp_atomic_update()
[all …]
A Dsti_cursor.c196 int src_w, src_h; in sti_cursor_atomic_check() local
215 src_h = new_plane_state->src_h >> 16; in sti_cursor_atomic_check()
218 src_h < STI_CURS_MIN_SIZE || in sti_cursor_atomic_check()
220 src_h > STI_CURS_MAX_SIZE) { in sti_cursor_atomic_check()
222 src_w, src_h); in sti_cursor_atomic_check()
229 (cursor->height != src_h)) { in sti_cursor_atomic_check()
231 cursor->height = src_h; in sti_cursor_atomic_check()
A Dsti_gdp.c632 int src_x, src_y, src_w, src_h; in sti_gdp_atomic_check() local
654 src_h = clamp_val(new_plane_state->src_h >> 16, 0, in sti_gdp_atomic_check()
701 src_w, src_h, src_x, src_y); in sti_gdp_atomic_check()
719 int src_x, src_y, src_w, src_h; in sti_gdp_atomic_update() local
741 (oldstate->src_h == newstate->src_h)) { in sti_gdp_atomic_update()
767 src_h = clamp_val(newstate->src_h >> 16, 0, GAM_GDP_SIZE_MAX_HEIGHT); in sti_gdp_atomic_update()
798 dst_h = sti_gdp_get_dst(gdp->dev, dst_h, src_h); in sti_gdp_atomic_update()
809 top_field->gam_gdp_size = src_h << 16 | src_w; in sti_gdp_atomic_update()
/drivers/media/platform/rockchip/rga/
A Drga-hw.c158 unsigned int src_h, src_w, dst_h, dst_w; in rga_cmd_set_trans_info() local
168 src_h = ctx->in.crop.height; in rga_cmd_set_trans_info()
246 if (dst_w == src_h) in rga_cmd_set_trans_info()
247 src_h -= 8; in rga_cmd_set_trans_info()
272 if (src_h == scale_dst_h) { in rga_cmd_set_trans_info()
275 } else if (src_h > scale_dst_h) { in rga_cmd_set_trans_info()
278 rga_get_scaling(src_h, scale_dst_h) + 1; in rga_cmd_set_trans_info()
292 src_act_info.data.act_height = src_h - 1; in rga_cmd_set_trans_info()
318 unsigned int src_h, src_w, src_x, src_y; in rga_cmd_set_src_info() local
320 src_h = ctx->in.crop.height; in rga_cmd_set_src_info()
[all …]
/drivers/gpu/drm/nouveau/dispnv04/
A Doverlay.c94 uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, in verify_scaling() argument
97 if (crtc_w < (src_w >> shift) || crtc_h < (src_h >> shift)) { in verify_scaling()
99 src_w, src_h, crtc_w, crtc_h); in verify_scaling()
117 uint32_t src_w, uint32_t src_h, in nv10_update_plane() argument
138 src_h >>= 16; in nv10_update_plane()
140 ret = verify_scaling(fb, shift, 0, 0, src_w, src_h, crtc_w, crtc_h); in nv10_update_plane()
156 nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w); in nv10_update_plane()
159 nvif_wr32(dev, NV_PVIDEO_DT_DY(flip), (src_h << 20) / crtc_h); in nv10_update_plane()
368 uint32_t src_w, uint32_t src_h, in nv04_update_plane() argument
384 src_h >>= 16; in nv04_update_plane()
[all …]
/drivers/gpu/drm/msm/disp/mdp5/
A Dmdp5_plane.c183 if (state->src_h > max_height) in mdp5_plane_atomic_check_with_state()
391 plane->state->src_h != new_plane_state->src_h || in mdp5_plane_atomic_async_check()
681 uint32_t roi_h = src_h; in mdp5_write_pixel_ext()
753 u32 src_w, u32 src_h) in mdp5_hwpipe_mode_set() argument
766 MDP5_PIPE_SRC_SIZE_HEIGHT(src_h)); in mdp5_hwpipe_mode_set()
811 src_h, pe->top, pe->bottom); in mdp5_hwpipe_mode_set()
860 uint32_t src_w, src_h; in mdp5_plane_mode_set() local
876 src_h = drm_rect_height(src); in mdp5_plane_mode_set()
887 src_h = src_h >> 16; in mdp5_plane_mode_set()
890 src_img_h = min(fb->height, src_h); in mdp5_plane_mode_set()
[all …]
/drivers/gpu/drm/imx/dc/
A Ddc-plane.c54 int src_h = drm_rect_height(&state->src) >> 16; in dc_plane_check_max_source_resolution() local
57 if (src_w > DC_PLANE_MAX_PIX_CNT || src_h > DC_PLANE_MAX_PIX_CNT) { in dc_plane_check_max_source_resolution()
140 int src_w, src_h; in dc_plane_atomic_update() local
147 src_h = drm_rect_height(&new_state->src) >> 16; in dc_plane_atomic_update()
156 fu_ops->set_src_buf_dimensions(fu, DC_FETCHUNIT_FRAC0, src_w, src_h); in dc_plane_atomic_update()
158 fu_ops->set_framedimensions(fu, src_w, src_h); in dc_plane_atomic_update()
/drivers/gpu/drm/imx/dcss/
A Ddcss-plane.c128 static bool dcss_plane_is_source_size_allowed(u16 src_w, u16 src_h, u32 pix_fmt) in dcss_plane_is_source_size_allowed() argument
138 return src_w >= 16 && src_h >= 8; in dcss_plane_is_source_size_allowed()
169 new_plane_state->src_h >> 16, in dcss_plane_atomic_check()
261 state->src_h != old_state->src_h || in dcss_plane_needs_setup()
280 u32 src_w, src_h, dst_w, dst_h; in dcss_plane_atomic_update() local
304 src_h = drm_rect_height(&src) >> 16; in dcss_plane_atomic_update()
316 dcss_dpr_set_res(dcss->dpr, dcss_plane->ch_num, src_w, src_h); in dcss_plane_atomic_update()
330 is_rotation_90_or_270 ? src_h : src_w, in dcss_plane_atomic_update()
331 is_rotation_90_or_270 ? src_w : src_h, in dcss_plane_atomic_update()
/drivers/gpu/drm/sun4i/
A Dsun8i_vi_layer.c57 u32 src_w, src_h, dst_w, dst_h; in sun8i_vi_layer_update_coord() local
74 src_h = drm_rect_height(&state->src) >> 16; in sun8i_vi_layer_update_coord()
96 src_h = (src_h + remainder) & ~mask; in sun8i_vi_layer_update_coord()
100 insize = SUN8I_MIXER_SIZE(src_w, src_h); in sun8i_vi_layer_update_coord()
107 DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h); in sun8i_vi_layer_update_coord()
136 required = src_h * 100 / dst_h; in sun8i_vi_layer_update_coord()
140 vm = src_h; in sun8i_vi_layer_update_coord()
142 src_h = vn; in sun8i_vi_layer_update_coord()
156 vscale = (src_h << 16) / dst_h; in sun8i_vi_layer_update_coord()
158 sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, dst_w, in sun8i_vi_layer_update_coord()
A Dsun8i_ui_layer.c54 u32 src_w, src_h, dst_w, dst_h; in sun8i_ui_layer_update_coord() local
68 src_h = drm_rect_height(&state->src) >> 16; in sun8i_ui_layer_update_coord()
75 insize = SUN8I_MIXER_SIZE(src_w, src_h); in sun8i_ui_layer_update_coord()
81 DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h); in sun8i_ui_layer_update_coord()
95 vscale = state->src_h / state->crtc_h; in sun8i_ui_layer_update_coord()
98 sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, in sun8i_ui_layer_update_coord()
104 sun8i_ui_scaler_setup(mixer, channel, src_w, src_h, in sun8i_ui_layer_update_coord()
A Dsun8i_vi_scaler.c929 u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, in sun8i_vi_scaler_setup() argument
944 insize = SUN8I_VI_SCALER_SIZE(src_w, src_h); in sun8i_vi_scaler_setup()
988 src_h / format->vsub)); in sun8i_vi_scaler_setup()
/drivers/gpu/drm/arm/
A Dmalidp_planes.c268 u32 src_w, src_h; in malidp_se_check_scaling() local
282 src_w = state->src_h >> 16; in malidp_se_check_scaling()
283 src_h = state->src_w >> 16; in malidp_se_check_scaling()
286 src_h = state->src_h >> 16; in malidp_se_check_scaling()
289 if ((state->crtc_w == src_w) && (state->crtc_h == src_h)) { in malidp_se_check_scaling()
742 u32 src_w, src_h, val = 0, src_x, src_y; in malidp_de_set_plane_afbc() local
758 src_h = plane->state->src_h >> 16; in malidp_de_set_plane_afbc()
792 u32 src_w, src_h, dest_w, dest_h, val; in malidp_de_plane_update() local
804 src_h = fb->height; in malidp_de_plane_update()
808 src_h = new_state->src_h >> 16; in malidp_de_plane_update()
[all …]
A Dhdlcd_crtc.c245 u32 src_h = new_plane_state->src_h >> 16; in hdlcd_plane_atomic_check() local
248 if (src_h >= HDLCD_MAX_YRES) { in hdlcd_plane_atomic_check()
249 DRM_DEBUG_KMS("Invalid source width: %d\n", src_h); in hdlcd_plane_atomic_check()
/drivers/gpu/drm/atmel-hlcdc/
A Datmel_hlcdc_plane.c55 uint32_t src_h; member
318 state->crtc_h < state->src_h ? in atmel_hlcdc_plane_setup_scaler()
325 yfactor = (1024 * state->src_h) / state->crtc_h; in atmel_hlcdc_plane_setup_scaler()
399 state->src_h)); in atmel_hlcdc_plane_update_pos_and_size()
605 pixels = (plane_state->src_w * plane_state->src_h) - in atmel_hlcdc_plane_prepare_ahb_routing()
729 hstate->src_h = drm_rect_height(&s->src); in atmel_hlcdc_plane_atomic_check()
742 hstate->src_h >>= 16; in atmel_hlcdc_plane_atomic_check()
769 offset = ((hstate->src_y + hstate->src_h - 1) / in atmel_hlcdc_plane_atomic_check()
778 offset = ((hstate->src_y + hstate->src_h - 1) / in atmel_hlcdc_plane_atomic_check()
781 hstate->xstride[i] = ((hstate->src_h - 1) / ydiv) * in atmel_hlcdc_plane_atomic_check()
[all …]
/drivers/gpu/drm/arm/display/komeda/
A Dkomeda_framebuffer.c210 u32 src_x, u32 src_y, u32 src_w, u32 src_h) in komeda_fb_check_src_coords() argument
217 if ((src_x + src_w > fb->width) || (src_y + src_h > fb->height)) { in komeda_fb_check_src_coords()
223 (src_y % info->vsub) || (src_h % info->vsub)) { in komeda_fb_check_src_coords()
225 src_x, src_y, src_w, src_h, info->format); in komeda_fb_check_src_coords()
230 (src_y % block_h) || (src_h % block_h)) { in komeda_fb_check_src_coords()
232 src_x, src_y, src_w, src_h, info->format); in komeda_fb_check_src_coords()
/drivers/gpu/drm/
A Ddrm_plane.c953 uint32_t src_w, uint32_t src_h) in __setplane_check() argument
1047 src_x, src_y, src_w, src_h); in __setplane_internal()
1054 src_x, src_y, src_w, src_h, ctx); in __setplane_internal()
1077 uint32_t src_w, uint32_t src_h, in __setplane_atomic() argument
1097 src_x, src_y, src_w, src_h); in __setplane_atomic()
1113 uint32_t src_w, uint32_t src_h) in setplane_internal() argument
1204 uint32_t src_w = 0, src_h = 0; in drm_mode_cursor_universal() local
1252 src_h = fb->height << 16; in drm_mode_cursor_universal()
1258 0, 0, src_w, src_h, ctx); in drm_mode_cursor_universal()
1262 0, 0, src_w, src_h, ctx); in drm_mode_cursor_universal()
[all …]
A Ddrm_plane_helper.c114 .src_h = drm_rect_height(src), in drm_plane_helper_check_update()
170 uint32_t src_w, uint32_t src_h, in drm_plane_helper_update_primary() argument
184 .y2 = src_y + src_h, in drm_plane_helper_update_primary()
/drivers/gpu/drm/meson/
A Dmeson_plane.c148 int src_w, src_h, dst_w, dst_h; in meson_plane_atomic_update() local
265 src_h = fixed16_to_int(new_state->src_h); in meson_plane_atomic_update()
283 vf_phase_step = (src_h << 20) / dst_h; in meson_plane_atomic_update()
293 if (src_h != dst_h || src_w != dst_w) { in meson_plane_atomic_update()
295 SCI_WH_M1_H(src_h - 1); in meson_plane_atomic_update()
310 if (src_h != dst_h) { in meson_plane_atomic_update()
/drivers/gpu/drm/vc4/
A Dvc4_plane.c538 vc4_state->src_h[1] = vc4_state->src_h[0] / v_subsample; in vc4_plane_setup_clipping_and_scaling()
544 vc4_get_scaling_mode(vc4_state->src_h[1], in vc4_plane_setup_clipping_and_scaling()
850 vc4_write_ppf(vc4_state, vc4_state->src_h[channel], in vc4_write_scaling_parameters()
863 vc4_write_tpz(vc4_state, vc4_state->src_h[channel], in vc4_write_scaling_parameters()
915 (vc4_state->src_h[i] >> 16) * in vc4_plane_calc_load()
1236 if (!vc4_state->src_w[0] || !vc4_state->src_h[0] || in vc4_plane_mode_set()
1244 height = vc4_state->src_h[0] >> 16; in vc4_plane_mode_set()
1776 height = vc4_state->src_h[0] >> 16; in vc6_plane_mode_set()
2285 plane->state->src_h = new_plane_state->src_h; in vc4_plane_atomic_async_update()
2308 memcpy(vc4_state->src_h, new_vc4_state->src_h, in vc4_plane_atomic_async_update()
[all …]
/drivers/gpu/drm/virtio/
A Dvirtgpu_plane.c253 plane->state->src_h >> 16, in virtio_gpu_primary_plane_update()
268 plane->state->src_h != old_state->src_h || in virtio_gpu_primary_plane_update()
278 plane->state->src_h >> 16, in virtio_gpu_primary_plane_update()
287 plane->state->src_h >> 16, in virtio_gpu_primary_plane_update()
294 plane->state->src_h >> 16, in virtio_gpu_primary_plane_update()
556 plane->state->src_h >> 16); in virtio_panic_flush()
/drivers/gpu/drm/exynos/
A Dexynos_drm_plane.c66 unsigned int src_w, src_h; in exynos_plane_mode_set() local
84 src_h = state->src_h >> 16; in exynos_plane_mode_set()
88 exynos_state->v_ratio = (src_h << 16) / crtc_h; in exynos_plane_mode_set()

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