| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | optc.h | 66 int vupdate_width; member
86 int vupdate_width,
105 int vupdate_width,
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| A D | timing_generator.h | 206 int vupdate_width,
292 int vupdate_width,
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| /drivers/gpu/drm/amd/display/dc/optc/dcn401/ |
| A D | dcn401_optc.c | 404 int vupdate_width, in optc401_program_global_sync() argument
412 optc1->vupdate_width = vupdate_width; in optc401_program_global_sync()
425 VUPDATE_WIDTH, optc1->vupdate_width); in optc401_program_global_sync()
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| A D | dcn401_optc.h | 181 int vupdate_width,
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| /drivers/gpu/drm/amd/display/dc/optc/dcn10/ |
| A D | dcn10_optc.c | 68 int vupdate_width, in optc1_program_global_sync() argument
76 optc1->vupdate_width = vupdate_width; in optc1_program_global_sync()
89 VUPDATE_WIDTH, optc1->vupdate_width); in optc1_program_global_sync()
162 int vupdate_width, in optc1_program_timing() argument
183 optc1->vupdate_width = vupdate_width; in optc1_program_timing()
290 vupdate_width, in optc1_program_timing()
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| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm_trace.h | 685 __field(int, vupdate_width)
703 __entry->vupdate_width = optc_state->vupdate_width;
724 __entry->vupdate_width,
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| /drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | display_rq_dlg_calc_20.c | 856 unsigned int vupdate_width; in dml20_rq_dlg_get_dlg_params() local
1003 vupdate_width = dst->vupdate_width; in dml20_rq_dlg_get_dlg_params()
1029 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20_rq_dlg_get_dlg_params()
1036 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20_rq_dlg_get_dlg_params()
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| A D | display_rq_dlg_calc_20v2.c | 856 unsigned int vupdate_width; in dml20v2_rq_dlg_get_dlg_params() local
1004 vupdate_width = dst->vupdate_width; in dml20v2_rq_dlg_get_dlg_params()
1030 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20v2_rq_dlg_get_dlg_params()
1037 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20v2_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| A D | display_rq_dlg_calc_21.c | 902 unsigned int vupdate_width; in dml_rq_dlg_get_dlg_params() local
1043 vupdate_width = dst->vupdate_width; in dml_rq_dlg_get_dlg_params()
1069 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
1076 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | display_rq_dlg_calc_30.c | 968 unsigned int vupdate_width = 0; in dml_rq_dlg_get_dlg_params() local
1104 vupdate_width = dst->vupdate_width; in dml_rq_dlg_get_dlg_params()
1130 - (double)(vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
1137 - (double)(vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| A D | display_rq_dlg_calc_31.c | 908 unsigned int vupdate_width; in dml_rq_dlg_get_dlg_params() local
1023 vupdate_width = dst->vupdate_width; in dml_rq_dlg_get_dlg_params()
1028 …if (vstartup_start / 2.0 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal <= v… in dml_rq_dlg_get_dlg_params()
1033 …if (vstartup_start - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal <= vblank_… in dml_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml/ |
| A D | dml1_display_rq_dlg_calc.c | 1061 unsigned int vupdate_width; in dml1_rq_dlg_get_dlg_params() local
1243 vupdate_width = e2e_pipe_param->pipe.dest.vupdate_width; in dml1_rq_dlg_get_dlg_params()
1313 line_setup = (double) (vupdate_offset + vupdate_width + vready_offset) / (double) htotal; in dml1_rq_dlg_get_dlg_params()
1335 DTRACE("DLG: %s: vupdate_width = %d", __func__, vupdate_width); in dml1_rq_dlg_get_dlg_params()
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| A D | display_mode_lib.c | 235 dml_print("DML PARAMS: vupdate_width = %d\n", pipe_dest->vupdate_width); in dml_log_pipe_params()
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| A D | display_mode_structs.h | 524 unsigned int vupdate_width; member
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| A D | display_mode_vba.h | 140 dml_get_pipe_attr_decl(vupdate_width);
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| /drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_timing_generator.h | 263 int vupdate_width,
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| A D | dce110_timing_generator_v.c | 440 int vupdate_width, in dce110_timing_generator_v_program_timing() argument
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| /drivers/gpu/drm/amd/display/dc/dce80/ |
| A D | dce80_timing_generator.c | 113 int vupdate_width, in dce80_timing_generator_program_timing() argument
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| /drivers/gpu/drm/amd/display/dc/dce60/ |
| A D | dce60_timing_generator.c | 113 int vupdate_width, in program_timing() argument
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| /drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| A D | display_rq_dlg_calc_314.c | 993 unsigned int vupdate_width; in dml_rq_dlg_get_dlg_params() local
1110 vupdate_width = dst->vupdate_width; in dml_rq_dlg_get_dlg_params()
1115 …if (vstartup_start / 2.0 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal <= v… in dml_rq_dlg_get_dlg_params()
1120 …if (vstartup_start - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal <= vblank_… in dml_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | display_mode_core.h | 183 dml_get_per_surface_var_decl(vupdate_width, dml_uint_t);
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| A D | dml2_utils.c | 255 pipe_ctx->pipe_dlg_param.vupdate_width = dml_get_vupdate_width(mode_lib, pipe_idx); in populate_pipe_ctx_dlg_params_from_dml()
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| /drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| A D | dcn_calcs.c | 448 input->dest.vupdate_width = pipe->pipe_dlg_param.vupdate_width; in pipe_ctx_to_e2e_pipe_params()
1209 pipe->pipe_dlg_param.vupdate_width = v->v_update_width_pix[input_idx]; in dcn_validate_bandwidth()
1250 hsplit_pipe->pipe_dlg_param.vupdate_width = v->v_update_width_pix[input_idx]; in dcn_validate_bandwidth()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| A D | dcn20_hwseq.c | 920 pipe_ctx->pipe_dlg_param.vupdate_width, in dcn20_enable_stream_timing()
1568 || old_pipe->pipe_dlg_param.vupdate_width != new_pipe->pipe_dlg_param.vupdate_width) in dcn20_detect_pipe_changes()
1906 pipe_ctx->pipe_dlg_param.vupdate_width, in dcn20_program_tg()
2507 pipe_ctx->pipe_dlg_param.vupdate_width, in dcn20_update_bandwidth()
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| /drivers/gpu/drm/amd/display/dc/dce120/ |
| A D | dce120_timing_generator.c | 699 int vupdate_width, in dce120_tg_program_timing() argument
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