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/include/linux/soc/mediatek/
A Dinfracfg.h86 #define MT8195_TOP_AXI_PROT_EN_MM_CAM (BIT(0) | BIT(2) | BIT(4))
161 BIT(10) | BIT(12) | \
162 BIT(14) | BIT(16) | \
163 BIT(24) | BIT(26))
166 BIT(15) | BIT(17) | \
167 BIT(25) | BIT(27))
216 #define MT8188_TOP_AXI_PROT_EN_INFRA_VDNR_PEXTP_MAC_P0_STEP2 (BIT(8) | BIT(18) | BIT(30))
234 #define MT8188_TOP_AXI_PROT_EN_MM_2_VPPSYS0_STEP4 (BIT(1) | BIT(4) | BIT(11))
376 BIT(9) | BIT(13))
435 BIT(7) | BIT(8))
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/include/linux/platform_data/x86/
A Dpmc_atom.h28 #define BIT_FD_GMM BIT(3)
29 #define BIT_FD_ISH BIT(4)
116 #define BIT_SCC_EMMC BIT(8)
117 #define BIT_SCC_SDIO BIT(9)
119 #define BIT_SCC_MIPI BIT(11)
121 #define BIT_LPE BIT(13)
122 #define BIT_OTG BIT(14)
142 #define BIT_SMB BIT(0)
145 #define BIT_DFX BIT(3)
148 #define BIT_STS_GMM BIT(1)
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/include/linux/mfd/
A Dlp873x.h90 #define LP873X_LDO0_CTRL_LDO0_EN BIT(0)
94 #define LP873X_LDO1_CTRL_LDO1_EN BIT(0)
118 #define LP873X_GPO_CTRL_GPO2_OD BIT(6)
120 #define LP873X_GPO_CTRL_GPO2_EN BIT(4)
121 #define LP873X_GPO_CTRL_GPO_OD BIT(2)
123 #define LP873X_GPO_CTRL_GPO_EN BIT(0)
128 #define LP873X_CONFIG_CLKIN_PD BIT(3)
129 #define LP873X_CONFIG_EN_PD BIT(2)
131 #define LP873X_EN_SPREAD_SPEC BIT(0)
133 #define LP873X_PLL_CTRL_EN_PLL BIT(6)
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A Dlp87565.h129 #define LP87565_INT_GPIO BIT(7)
133 #define LP87565_TDIE_SD BIT(3)
134 #define LP87565_TDIE_WARN BIT(2)
135 #define LP87565_INT_OVP BIT(1)
157 #define LP87565_OVP_STAT BIT(1)
200 #define LP87565_HALF_DAY BIT(7)
205 #define LP87565_PGOOD_OD BIT(1)
208 #define LP87565_PG3_FLT BIT(3)
209 #define LP87565_PG2_FLT BIT(2)
210 #define LP87565_PG1_FLT BIT(1)
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A Drohm-bd71815.h263 #define LDO1_EN BIT(0)
264 #define LDO2_EN BIT(1)
265 #define LDO3_EN BIT(2)
266 #define DVREF_EN BIT(3)
315 #define OUT32K_EN BIT(0)
321 #define BAT_DET BIT(5)
324 #define VBAT_OV BIT(3)
325 #define DBAT_DET BIT(0)
328 #define VBUS_DET BIT(0)
334 #define A0_ONESEC BIT(7)
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A Dtps6594.h249 #define TPS6594_BIT_BUCK_EN BIT(0)
279 #define TPS6594_BIT_LDO_EN BIT(0)
302 #define TPS6594_BIT_VMON_EN BIT(0)
326 #define TPS6594_BIT_GPIO_OD BIT(1)
606 #define TPS6594_BIT_WD_INT BIT(7)
719 #define TPS6594_BB_EOC_RDY BIT(7)
760 #define TPS6594_BIT_SS_EN BIT(2)
894 #define TPS6594_BIT_RUN BIT(1)
895 #define TPS6594_BIT_TIMER BIT(5)
896 #define TPS6594_BIT_ALARM BIT(6)
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A Dtps65218.h63 #define TPS65218_INT1_VPRG BIT(5)
64 #define TPS65218_INT1_AC BIT(4)
65 #define TPS65218_INT1_PB BIT(3)
66 #define TPS65218_INT1_HOT BIT(2)
68 #define TPS65218_INT1_PRGC BIT(0)
70 #define TPS65218_INT2_LS3_F BIT(5)
71 #define TPS65218_INT2_LS2_F BIT(4)
72 #define TPS65218_INT2_LS1_F BIT(3)
73 #define TPS65218_INT2_LS3_I BIT(2)
74 #define TPS65218_INT2_LS2_I BIT(1)
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A Dtps65219.h138 #define TPS65219_BUCKS_BW_SEL_MASK BIT(7)
185 #define TPS65219_MFP_2_PB BIT(4)
186 #define TPS65219_MFP_2_VSENSE BIT(5)
204 #define TPS65219_INT_LDO3_OC_MASK BIT(1)
205 #define TPS65219_INT_LDO3_UV_MASK BIT(2)
207 #define TPS65219_INT_LDO4_OC_MASK BIT(4)
208 #define TPS65219_INT_LDO4_UV_MASK BIT(5)
211 #define TPS65219_INT_LDO1_OC_MASK BIT(1)
212 #define TPS65219_INT_LDO1_UV_MASK BIT(2)
214 #define TPS65219_INT_LDO2_OC_MASK BIT(4)
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A Dti-lmu-register.h17 #define LM3631_LCD_EN_MASK BIT(1)
18 #define LM3631_BL_EN_MASK BIT(0)
27 #define LM3631_MAP_MASK BIT(5)
31 #define LM3631_MODE_MASK (BIT(1) | BIT(2) | BIT(3))
32 #define LM3631_DEFAULT_MODE (BIT(1) | BIT(3))
47 #define LM3631_VOUT_CONT_MASK (BIT(6) | BIT(7))
68 #define LM3632_OVP_MASK (BIT(5) | BIT(6) | BIT(7))
69 #define LM3632_OVP_25V BIT(6)
79 #define LM3632_PWM_MASK BIT(6)
85 #define LM3632_BL_CHANNEL_MASK (BIT(3) | BIT(4))
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A Datmel-hlcdc.h17 #define ATMEL_HLCDC_HSPOL BIT(0)
18 #define ATMEL_HLCDC_VSPOL BIT(1)
19 #define ATMEL_HLCDC_VSPDLYS BIT(2)
20 #define ATMEL_HLCDC_VSPDLYE BIT(3)
21 #define ATMEL_HLCDC_DISPPOL BIT(4)
22 #define ATMEL_HLCDC_DITHER BIT(6)
26 #define ATMEL_XLCDC_DPI BIT(11)
27 #define ATMEL_HLCDC_PP BIT(10)
55 #define ATMEL_HLCDC_SYNC BIT(1)
59 #define ATMEL_XLCDC_SD BIT(5)
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A Dtps65217.h68 #define TPS65217_INT_PBM BIT(6)
69 #define TPS65217_INT_ACM BIT(5)
70 #define TPS65217_INT_USBM BIT(4)
71 #define TPS65217_INT_PBI BIT(2)
72 #define TPS65217_INT_ACI BIT(1)
73 #define TPS65217_INT_USBI BIT(0)
113 #define TPS65217_STATUS_OFF BIT(7)
116 #define TPS65217_STATUS_PB BIT(0)
135 #define TPS65217_DEFSLEW_GO BIT(7)
182 #define TPS65217_SEQ6_SEQUP BIT(2)
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/include/linux/mfd/abx500/
A Dab8500-sysctrl.h83 #define AB8500_TURNONSTATUS_PORNVBAT BIT(0)
86 #define AB8500_TURNONSTATUS_RTCALARM BIT(3)
87 #define AB8500_TURNONSTATUS_MAINCHDET BIT(4)
88 #define AB8500_TURNONSTATUS_VBUSDET BIT(5)
106 #define AB8500_STW4500CTRL1_SWOFF BIT(0)
122 #define AB8500_STW4500CTRL3_THSDENA BIT(3)
131 #define AB8500_LOWBAT_LOWBATENA BIT(0)
184 #define AB8500_SYSCLKCTRL_USBCLKENA BIT(2)
237 #define AB8500_SWATCTRL_UPDATERF BIT(0)
238 #define AB8500_SWATCTRL_SWATENABLE BIT(1)
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/include/linux/ulpi/
A Dregs.h51 #define ULPI_FUNC_CTRL_XCVRSEL BIT(0)
58 #define ULPI_FUNC_CTRL_OPMODE BIT(3)
64 #define ULPI_FUNC_CTRL_RESET BIT(5)
83 #define ULPI_OTG_CTRL_DRVVBUS BIT(5)
93 #define ULPI_INT_VBUS_VALID BIT(1)
94 #define ULPI_INT_SESS_VALID BIT(2)
95 #define ULPI_INT_SESS_END BIT(3)
96 #define ULPI_INT_IDGRD BIT(4)
99 #define ULPI_DEBUG_LINESTATE0 BIT(0)
100 #define ULPI_DEBUG_LINESTATE1 BIT(1)
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/include/linux/
A Dintel_pmt_features.h9 #define PMT_CAP_TELEM BIT(0)
10 #define PMT_CAP_WATCHER BIT(1)
11 #define PMT_CAP_CRASHLOG BIT(2)
12 #define PMT_CAP_STREAMING BIT(3)
13 #define PMT_CAP_THRESHOLD BIT(4)
14 #define PMT_CAP_WINDOW BIT(5)
15 #define PMT_CAP_CONFIG BIT(6)
16 #define PMT_CAP_TRACING BIT(7)
17 #define PMT_CAP_INBAND BIT(8)
18 #define PMT_CAP_OOB BIT(9)
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A Dhwmon.h64 #define HWMON_C_PEC BIT(hwmon_chip_pec)
99 #define HWMON_T_TYPE BIT(hwmon_temp_type)
102 #define HWMON_T_MIN BIT(hwmon_temp_min)
104 #define HWMON_T_MAX BIT(hwmon_temp_max)
106 #define HWMON_T_CRIT BIT(hwmon_temp_crit)
151 #define HWMON_I_MIN BIT(hwmon_in_min)
152 #define HWMON_I_MAX BIT(hwmon_in_max)
154 #define HWMON_I_CRIT BIT(hwmon_in_crit)
167 #define HWMON_I_BEEP BIT(hwmon_in_beep)
194 #define HWMON_C_MIN BIT(hwmon_curr_min)
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A Dturris-omnia-mcu-interface.h107 OMNIA_STS_CARD_DET = BIT(4),
120 OMNIA_CTL_LIGHT_RST = BIT(0),
121 OMNIA_CTL_HARD_RST = BIT(1),
125 OMNIA_CTL_ENABLE_4V5 = BIT(5),
127 OMNIA_CTL_BOOTLOADER = BIT(7),
132 OMNIA_FEAT_EXT_CMDS = BIT(1),
145 OMNIA_FEAT_TRNG = BIT(13),
146 OMNIA_FEAT_CRYPTO = BIT(14),
209 OMNIA_INT_CARD_DET = BIT(0),
214 OMNIA_INT_SFP_nDET = BIT(5),
[all …]
A Dalcor_pci.h60 #define AU6621_DMA_ENABLE BIT(0)
96 #define AU6601_MS_CARD_WP BIT(3)
97 #define AU6601_SD_CARD_WP BIT(0)
104 #define AU6601_XD_CARD BIT(4)
106 #define AU6601_MS_CARD BIT(3)
107 #define AU6601_SD_CARD BIT(0)
113 #define AU6601_DETECT_EN BIT(7)
120 #define AU6601_RESET_DATA BIT(3)
121 #define AU6601_RESET_CMD BIT(0)
145 #define AU6601_DATA_WRITE BIT(7)
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/include/linux/amba/
A Dserial.h78 #define UART011_DR_OE BIT(11)
79 #define UART011_DR_BE BIT(10)
80 #define UART011_DR_PE BIT(9)
81 #define UART011_DR_FE BIT(8)
83 #define UART01x_RSR_OE BIT(3)
84 #define UART01x_RSR_BE BIT(2)
85 #define UART01x_RSR_PE BIT(1)
86 #define UART01x_RSR_FE BIT(0)
88 #define UART011_FR_RI BIT(8)
94 #define UART01x_FR_DCD BIT(2)
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/include/soc/mscc/
A Docelot_dev.h11 #define DEV_CLOCK_CFG_MAC_TX_RST BIT(7)
12 #define DEV_CLOCK_CFG_MAC_RX_RST BIT(6)
13 #define DEV_CLOCK_CFG_PCS_TX_RST BIT(5)
14 #define DEV_CLOCK_CFG_PCS_RX_RST BIT(4)
15 #define DEV_CLOCK_CFG_PORT_RST BIT(3)
16 #define DEV_CLOCK_CFG_PHY_RST BIT(2)
20 #define DEV_PORT_MISC_FWD_ERROR_ENA BIT(4)
21 #define DEV_PORT_MISC_FWD_PAUSE_ENA BIT(3)
22 #define DEV_PORT_MISC_FWD_CTRL_ENA BIT(2)
23 #define DEV_PORT_MISC_DEV_LOOP_ENA BIT(1)
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/include/linux/mfd/syscon/
A Dimx6q-iomuxc-gpr.h95 #define IMX6Q_GPR1_PCIE_SW_RST BIT(29)
100 #define IMX6Q_GPR1_DPI_OFF BIT(24)
119 #define IMX6Q_GPR1_PCIE_INT BIT(14)
123 #define IMX6Q_GPR1_GINT BIT(12)
128 #define IMX6Q_GPR1_ACT_CS3 BIT(9)
130 #define IMX6Q_GPR1_ACT_CS2 BIT(6)
132 #define IMX6Q_GPR1_ACT_CS1 BIT(3)
134 #define IMX6Q_GPR1_ACT_CS0 BIT(0)
270 #define IMX6Q_GPR9_TZASC2_BYP BIT(1)
271 #define IMX6Q_GPR9_TZASC1_BYP BIT(0)
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/include/linux/mfd/da9150/
A Dregisters.h162 #define DA9150_REVERT_MASK BIT(7)
303 #define DA9150_E_CHG_MASK BIT(1)
321 #define DA9150_E_DAT_MASK BIT(1)
325 #define DA9150_E_ID_MASK BIT(4)
327 #define DA9150_E_ADP_MASK BIT(5)
335 #define DA9150_E_FG_MASK BIT(0)
337 #define DA9150_E_GP_MASK BIT(1)
373 #define DA9150_M_ID_MASK BIT(4)
383 #define DA9150_M_FG_MASK BIT(0)
385 #define DA9150_M_GP_MASK BIT(1)
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/include/linux/soundwire/
A Dsdw_registers.h39 #define SDW_DP0_INT_TEST_FAIL BIT(0)
40 #define SDW_DP0_INT_PORT_READY BIT(1)
41 #define SDW_DP0_INT_BRA_FAILURE BIT(2)
42 #define SDW_DP0_SDCA_CASCADE BIT(3)
44 #define SDW_DP0_INT_IMPDEF1 BIT(5)
45 #define SDW_DP0_INT_IMPDEF2 BIT(6)
46 #define SDW_DP0_INT_IMPDEF3 BIT(7)
70 #define SDW_SCP_INT1_PARITY BIT(0)
72 #define SDW_SCP_INT1_IMPL_DEF BIT(2)
95 #define SDW_SCP_STAT_HPHY_NOK BIT(5)
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/include/linux/spi/
A Dsh_msiof.h73 #define SICTR_TXE BIT(9) /* Transmit Enable */
74 #define SICTR_RXE BIT(8) /* Receive Enable */
75 #define SICTR_TXRST BIT(1) /* Transmit Reset */
76 #define SICTR_RXRST BIT(0) /* Receive Reset */
101 #define SISTR_TFEMP BIT(29) /* Transmit FIFO Empty */
103 #define SISTR_TEOF BIT(23) /* Frame Transmission End */
105 #define SISTR_TFOVF BIT(20) /* Transmit FIFO Overflow */
107 #define SISTR_RFFUL BIT(13) /* Receive FIFO Full */
109 #define SISTR_REOF BIT(7) /* Frame Reception End */
111 #define SISTR_RFUDF BIT(4) /* Receive FIFO Underflow */
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/include/linux/mfd/atc260x/
A Datc2603c.h261 #define ATC2603C_INTS_MSK_AUDIO BIT(0)
262 #define ATC2603C_INTS_MSK_OV BIT(1)
263 #define ATC2603C_INTS_MSK_OC BIT(2)
264 #define ATC2603C_INTS_MSK_OT BIT(3)
265 #define ATC2603C_INTS_MSK_UV BIT(4)
266 #define ATC2603C_INTS_MSK_ALARM BIT(5)
267 #define ATC2603C_INTS_MSK_ONOFF BIT(6)
268 #define ATC2603C_INTS_MSK_SGPIO BIT(7)
269 #define ATC2603C_INTS_MSK_IR BIT(8)
270 #define ATC2603C_INTS_MSK_REMCON BIT(9)
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/include/linux/mfd/da9062/
A Dregisters.h160 #define DA9062AA_REVERT_MASK BIT(7)
172 #define DA9062AA_GPI1_MASK BIT(1)
174 #define DA9062AA_GPI2_MASK BIT(2)
176 #define DA9062AA_GPI3_MASK BIT(3)
178 #define DA9062AA_GPI4_MASK BIT(4)
194 #define DA9062AA_POR_MASK BIT(1)
214 #define DA9062AA_E_TICK_MASK BIT(2)
226 #define DA9062AA_E_TEMP_MASK BIT(1)
238 #define DA9062AA_E_GPI1_MASK BIT(1)
240 #define DA9062AA_E_GPI2_MASK BIT(2)
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