| /sound/soc/mediatek/mt8183/ |
| A D | mt8183-afe-clk.c | 97 afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk), in mt8183_init_clock() 99 if (!afe_priv->clk) in mt8183_init_clock() 104 if (IS_ERR(afe_priv->clk[i])) { in mt8183_init_clock() 107 PTR_ERR(afe_priv->clk[i])); in mt8183_init_clock() 108 return PTR_ERR(afe_priv->clk[i]); in mt8183_init_clock() 135 afe_priv->clk[CLK_CLK26M]); in mt8183_afe_enable_clock() 269 afe_priv->clk[CLK_CLK26M]); in apll1_mux_setting() 279 afe_priv->clk[CLK_CLK26M]); in apll1_mux_setting() 293 afe_priv->clk[CLK_CLK26M]); in apll1_mux_setting() 298 afe_priv->clk[CLK_CLK26M]); in apll1_mux_setting() [all …]
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| A D | mt8183-dai-adda.c | 64 struct mt8183_afe_private *afe_priv = afe->platform_priv; in mtk_adda_ul_event() local 72 if (afe_priv->mtkaif_dmic) { in mtk_adda_ul_event() 118 struct mt8183_afe_private *afe_priv = afe->platform_priv; in mt8183_adda_dmic_get() local 139 __func__, kcontrol->id.name, afe_priv->mtkaif_dmic); in mt8183_adda_dmic_set() 223 switch (afe_priv->mtkaif_protocol) { in set_mtkaif_rx() 231 if (afe_priv->mtkaif_phase_cycle[0] >= in set_mtkaif_rx() 232 afe_priv->mtkaif_phase_cycle[1]) { in set_mtkaif_rx() 234 delay_cycle = afe_priv->mtkaif_phase_cycle[0] - in set_mtkaif_rx() 235 afe_priv->mtkaif_phase_cycle[1]; in set_mtkaif_rx() 238 delay_cycle = afe_priv->mtkaif_phase_cycle[1] - in set_mtkaif_rx() [all …]
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| /sound/soc/mediatek/mt8186/ |
| A D | mt8186-afe-clk.c | 80 afe_priv->clk[clk_id]); in mt8186_set_audio_int_bus_parent() 129 afe_priv->clk[CLK_CLK26M]); in apll1_mux_setting() 139 afe_priv->clk[CLK_CLK26M]); in apll1_mux_setting() 190 afe_priv->clk[CLK_CLK26M]); in apll2_mux_setting() 266 afe_priv->clk[CLK_CLK26M]); in mt8186_afe_enable_clock() 549 afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk), in mt8186_init_clock() 551 if (!afe_priv->clk) in mt8186_init_clock() 556 if (IS_ERR(afe_priv->clk[i])) { in mt8186_init_clock() 560 afe_priv->clk[i] = NULL; in mt8186_init_clock() 574 if (IS_ERR(afe_priv->topckgen)) { in mt8186_init_clock() [all …]
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| A D | mt8186-dai-adda.c | 55 return afe_priv->dai_priv[dai_id]; in get_adda_priv_by_name() 162 int mtkaif_dmic = afe_priv->mtkaif_dmic; in mtk_adda_ul_event() 244 afe_priv->mtkaif_chosen_phase[0], in mtk_adda_mtkaif_cfg_event() 245 afe_priv->mtkaif_chosen_phase[1]); in mtk_adda_mtkaif_cfg_event() 254 afe_priv->mtkaif_chosen_phase[0], in mtk_adda_mtkaif_cfg_event() 255 afe_priv->mtkaif_chosen_phase[1]); in mtk_adda_mtkaif_cfg_event() 261 if (afe_priv->mtkaif_phase_cycle[0] >= in mtk_adda_mtkaif_cfg_event() 262 afe_priv->mtkaif_phase_cycle[1]) { in mtk_adda_mtkaif_cfg_event() 349 if (afe_priv->mtkaif_dmic == dmic_on) in mt8186_adda_dmic_set() 352 afe_priv->mtkaif_dmic = dmic_on; in mt8186_adda_dmic_set() [all …]
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| A D | mt8186-misc-control.c | 79 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mt8186_sgen_get() local 81 ucontrol->value.integer.value[0] = afe_priv->sgen_mode; in mt8186_sgen_get() 91 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mt8186_sgen_set() local 105 if (mode == afe_priv->sgen_mode) in mt8186_sgen_set() 123 afe_priv->sgen_mode = mode; in mt8186_sgen_set() 133 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mt8186_sgen_rate_get() local 135 ucontrol->value.integer.value[0] = afe_priv->sgen_rate; in mt8186_sgen_rate_get() 156 if (rate == afe_priv->sgen_rate) in mt8186_sgen_rate_set() 167 afe_priv->sgen_rate = rate; in mt8186_sgen_rate_set() 204 if (amplitude == afe_priv->sgen_amplitude) in mt8186_sgen_amplitude_set() [all …]
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| A D | mt8186-dai-tdm.c | 105 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_tdm_en_event() local 132 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_tdm_mck_en_event() local 204 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_afe_tdm_mclk_connect() local 217 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_afe_tdm_mclk_apll_connect() local 234 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_afe_tdm_hd_connect() local 247 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_afe_tdm_apll_connect() local 277 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mt8186_tdm_hd_get() local 291 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mt8186_tdm_hd_set() local 368 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_dai_tdm_hw_params() local 463 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_dai_tdm_set_sysclk() local [all …]
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| A D | mt8186-audsys-clk.c | 90 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mt8186_audsys_clk_unregister() local 95 if (!afe_priv) in mt8186_audsys_clk_unregister() 99 cl = afe_priv->lookup[i]; in mt8186_audsys_clk_unregister() 112 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mt8186_audsys_clk_register() local 117 afe_priv->lookup = devm_kcalloc(afe->dev, CLK_AUD_NR_CLK, in mt8186_audsys_clk_register() 118 sizeof(*afe_priv->lookup), in mt8186_audsys_clk_register() 121 if (!afe_priv->lookup) in mt8186_audsys_clk_register() 147 afe_priv->lookup[i] = cl; in mt8186_audsys_clk_register()
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| /sound/soc/mediatek/mt8192/ |
| A D | mt8192-afe-clk.c | 70 afe_priv->clk[clk_id]); in mt8192_set_audio_int_bus_parent() 118 afe_priv->clk[CLK_CLK26M]); in apll1_mux_setting() 128 afe_priv->clk[CLK_CLK26M]); in apll1_mux_setting() 180 afe_priv->clk[CLK_CLK26M]); in apll2_mux_setting() 190 afe_priv->clk[CLK_CLK26M]); in apll2_mux_setting() 230 afe_priv->clk[CLK_CLK26M]); in mt8192_afe_enable_clock() 625 afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk), in mt8192_init_clock() 627 if (!afe_priv->clk) in mt8192_init_clock() 632 if (IS_ERR(afe_priv->clk[i])) { in mt8192_init_clock() 636 afe_priv->clk[i] = NULL; in mt8192_init_clock() [all …]
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| A D | mt8192-dai-adda.c | 220 int mtkaif_dmic = afe_priv->mtkaif_dmic; in mtk_adda_ul_event() 298 afe_priv->mtkaif_dmic_ch34 = 0; in mtk_adda_ch34_ul_event() 360 afe_priv->mtkaif_chosen_phase[0], in mtk_adda_mtkaif_cfg_event() 361 afe_priv->mtkaif_chosen_phase[1]); in mtk_adda_mtkaif_cfg_event() 368 afe_priv->mtkaif_chosen_phase[2]); in mtk_adda_mtkaif_cfg_event() 381 if (afe_priv->mtkaif_phase_cycle[0] >= in mtk_adda_mtkaif_cfg_event() 382 afe_priv->mtkaif_phase_cycle[1]) { in mtk_adda_mtkaif_cfg_event() 405 if (afe_priv->mtkaif_phase_cycle[2] >= in mtk_adda_mtkaif_cfg_event() 552 afe_priv->mtkaif_dmic = dmic_on; in mt8192_adda_dmic_set() 553 afe_priv->mtkaif_dmic_ch34 = dmic_on; in mt8192_adda_dmic_set() [all …]
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| A D | mt8192-mt6359-rt1015-rt5682.c | 180 regmap_update_bits(afe_priv->topckgen, in mt8192_mt6359_mtkaif_calibration() 185 afe_priv->mtkaif_chosen_phase[0] = -1; in mt8192_mt6359_mtkaif_calibration() 186 afe_priv->mtkaif_chosen_phase[1] = -1; in mt8192_mt6359_mtkaif_calibration() 187 afe_priv->mtkaif_chosen_phase[2] = -1; in mt8192_mt6359_mtkaif_calibration() 196 regmap_update_bits(afe_priv->topckgen, in mt8192_mt6359_mtkaif_calibration() 209 regmap_read(afe_priv->topckgen, in mt8192_mt6359_mtkaif_calibration() 258 regmap_update_bits(afe_priv->topckgen, in mt8192_mt6359_mtkaif_calibration() 267 if (afe_priv->mtkaif_chosen_phase[0] < 0) in mt8192_mt6359_mtkaif_calibration() 300 afe_priv->mtkaif_chosen_phase[0], in mt8192_mt6359_mtkaif_calibration() 301 afe_priv->mtkaif_chosen_phase[1], in mt8192_mt6359_mtkaif_calibration() [all …]
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| /sound/soc/mediatek/mt8365/ |
| A D | mt8365-afe-clk.c | 41 if (IS_ERR(afe_priv->clocks[i])) { in mt8365_afe_init_audio_clk() 44 return PTR_ERR(afe_priv->clocks[i]); in mt8365_afe_init_audio_clk() 201 afe_priv->top_cg_ref_cnt[cg_type]++; in mt8365_afe_enable_top_cg() 220 afe_priv->top_cg_ref_cnt[cg_type]--; in mt8365_afe_disable_top_cg() 270 afe_priv->afe_on_ref_cnt++; in mt8365_afe_enable_afe_on() 271 if (afe_priv->afe_on_ref_cnt == 1) in mt8365_afe_enable_afe_on() 286 afe_priv->afe_on_ref_cnt--; in mt8365_afe_disable_afe_on() 287 if (afe_priv->afe_on_ref_cnt == 0) in mt8365_afe_disable_afe_on() 290 afe_priv->afe_on_ref_cnt = 0; in mt8365_afe_disable_afe_on() 325 mutex_lock(&afe_priv->afe_clk_mutex); in mt8365_afe_enable_apll_tuner_cfg() [all …]
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| A D | mt8365-dai-i2s.c | 334 afe_priv->dai_priv[MT8365_AFE_IO_I2S]; in mt8365_afe_set_i2s_out() 478 spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); in mt8365_afe_set_i2s_out_enable() 577 afe_priv->clocks[i2s_data->clk_id_out]); in mt8365_dai_i2s_shutdown() 581 afe_priv->clocks[i2s_data->clk_id_in]); in mt8365_dai_i2s_shutdown() 637 afe_priv->clocks[MT8365_CLK_AUD1] : in mt8365_dai_i2s_prepare() 638 afe_priv->clocks[MT8365_CLK_AUD2])); in mt8365_dai_i2s_prepare() 641 afe_priv->clocks[i2s_data->clk_id_out], in mt8365_dai_i2s_prepare() 650 afe_priv->clocks[i2s_data->clk_id_in_m_sel], in mt8365_dai_i2s_prepare() 652 afe_priv->clocks[MT8365_CLK_AUD1] : in mt8365_dai_i2s_prepare() 653 afe_priv->clocks[MT8365_CLK_AUD2])); in mt8365_dai_i2s_prepare() [all …]
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| A D | mt8365-dai-adda.c | 67 struct mt8365_afe_private *afe_priv = afe->platform_priv; in mt8365_dai_enable_adda_on() local 69 spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); in mt8365_dai_enable_adda_on() 77 spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); in mt8365_dai_enable_adda_on() 85 struct mt8365_afe_private *afe_priv = afe->platform_priv; in mt8365_dai_disable_adda_on() local 87 spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); in mt8365_dai_disable_adda_on() 99 spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); in mt8365_dai_disable_adda_on() 156 struct mt8365_afe_private *afe_priv = afe->platform_priv; in mt8365_dai_int_adda_shutdown() local 158 &afe_priv->be_data[dai->id - MT8365_AFE_BACKEND_BASE]; in mt8365_dai_int_adda_shutdown() 185 struct mt8365_afe_private *afe_priv = afe->platform_priv; in mt8365_dai_int_adda_prepare() local 187 &afe_priv->be_data[dai->id - MT8365_AFE_BACKEND_BASE]; in mt8365_dai_int_adda_prepare()
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| /sound/soc/mediatek/mt6797/ |
| A D | mt6797-afe-clk.c | 36 struct mt6797_afe_private *afe_priv = afe->platform_priv; in mt6797_init_clock() local 39 afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk), in mt6797_init_clock() 41 if (!afe_priv->clk) in mt6797_init_clock() 45 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt6797_init_clock() 46 if (IS_ERR(afe_priv->clk[i])) { in mt6797_init_clock() 49 PTR_ERR(afe_priv->clk[i])); in mt6797_init_clock() 50 return PTR_ERR(afe_priv->clk[i]); in mt6797_init_clock() 83 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD], in mt6797_afe_enable_clock() 84 afe_priv->clk[CLK_CLK26M]); in mt6797_afe_enable_clock() 104 clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD]); in mt6797_afe_enable_clock() [all …]
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| /sound/soc/mediatek/mt2701/ |
| A D | mt2701-afe-clock-ctrl.c | 27 struct mt2701_afe_private *afe_priv = afe->platform_priv; in mt2701_init_clock() local 32 if (IS_ERR(afe_priv->base_ck[i])) { in mt2701_init_clock() 34 return PTR_ERR(afe_priv->base_ck[i]); in mt2701_init_clock() 39 for (i = 0; i < afe_priv->soc->i2s_num; i++) { in mt2701_init_clock() 40 struct mt2701_i2s_path *i2s_path = &afe_priv->i2s_path[i]; in mt2701_init_clock() 91 if (IS_ERR(afe_priv->mrgif_ck)) { in mt2701_init_clock() 92 if (PTR_ERR(afe_priv->mrgif_ck) == -EPROBE_DEFER) in mt2701_init_clock() 95 afe_priv->mrgif_ck = NULL; in mt2701_init_clock() 137 struct mt2701_afe_private *afe_priv = afe->platform_priv; in mt2701_afe_enable_mclk() local 155 return clk_prepare_enable(afe_priv->mrgif_ck); in mt2701_enable_btmrg_clk() [all …]
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| /sound/soc/mediatek/mt8188/ |
| A D | mt8188-afe-clk.c | 262 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_enable_tuner_clk() local 385 return clk_get_rate(afe_priv->clk[clk_id]); in mt8188_afe_get_mclk_source_rate() 418 afe_priv->clk = in mt8188_afe_init_clock() 421 if (!afe_priv->clk) in mt8188_afe_init_clock() 425 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt8188_afe_init_clock() 426 if (IS_ERR(afe_priv->clk[i])) { in mt8188_afe_init_clock() 429 PTR_ERR(afe_priv->clk[i])); in mt8188_afe_init_clock() 430 return PTR_ERR(afe_priv->clk[i]); in mt8188_afe_init_clock() 679 afe_priv->clk[MT8188_CLK_TOP_APLL1_D4]); in mt8188_apll1_enable() 697 afe_priv->clk[MT8188_CLK_XTAL_26M]); in mt8188_apll1_enable() [all …]
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| A D | mt8188-dai-dmic.c | 238 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mtk_dai_dmic_hw_gain_enable() local 261 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mtk_dmic_gain_event() local 291 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mtk_dmic_event() local 343 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC1]); in mtk_dmic_event() 344 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC2]); in mtk_dmic_event() 345 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC3]); in mtk_dmic_event() 396 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mtk_dai_dmic_hw_params() local 544 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mtk_dai_dmic_hw_gain_ctrl_put() local 575 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mtk_dai_dmic_hw_gain_ctrl_get() local 651 struct mt8188_afe_private *afe_priv = afe->platform_priv; in init_dmic_priv_data() local [all …]
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| A D | mt8188-dai-adda.c | 34 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_adda_mtkaif_init() local 35 struct mtkaif_param *param = &afe_priv->mtkaif_params; in mt8188_adda_mtkaif_init() 138 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mtk_adda_ul_event() local 139 struct mtkaif_param *param = &afe_priv->mtkaif_params; in mtk_adda_ul_event() 162 struct mt8188_afe_private *afe_priv = afe->platform_priv; in get_adda_priv_by_name() local 165 return afe_priv->dai_priv[MT8188_AFE_IO_UL_SRC]; in get_adda_priv_by_name() 167 return afe_priv->dai_priv[MT8188_AFE_IO_DL_SRC]; in get_adda_priv_by_name() 315 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_adda_dmic_get() local 316 struct mtkaif_param *param = &afe_priv->mtkaif_params; in mt8188_adda_dmic_get() 328 struct mtkaif_param *param = &afe_priv->mtkaif_params; in mt8188_adda_dmic_set() [all …]
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| A D | mt8188-dai-etdm.c | 254 etdm_data = afe_priv->dai_priv[dai->id]; in is_cowork_mode() 287 etdm_data = afe_priv->dai_priv[dai->id]; in get_etdm_cowork_master_id() 383 return afe_priv->dai_priv[dai_id]; in get_etdm_priv_by_name() 401 etdm_data = afe_priv->dai_priv[dai_id]; in mtk_dai_etdm_enable_mclk() 426 afe_priv->clk[apll_clk_id]); in mtk_dai_etdm_enable_mclk() 518 etdm_priv = afe_priv->dai_priv[mclk_id]; in mtk_etdm_mclk_connect() 1741 etdm_data = afe_priv->dai_priv[dai_id]; in mt8188_etdm_sync_mode_slv() 1796 etdm_data = afe_priv->dai_priv[dai_id]; in mt8188_etdm_sync_mode_mst() 1850 etdm_data = afe_priv->dai_priv[dai_id]; in mt8188_etdm_sync_mode_configure() 2579 etdm_data = afe_priv->dai_priv[i]; in mt8188_etdm_update_sync_info() [all …]
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| /sound/soc/mediatek/mt8195/ |
| A D | mt8195-afe-clk.c | 243 struct mt8195_afe_private *afe_priv = afe->platform_priv; in mt8195_afe_enable_tuner_clk() local 264 struct mt8195_afe_private *afe_priv = afe->platform_priv; in mt8195_afe_disable_tuner_clk() local 360 struct mt8195_afe_private *afe_priv = afe->platform_priv; in mt8195_afe_get_mclk_source_rate() local 368 return clk_get_rate(afe_priv->clk[clk_id]); in mt8195_afe_get_mclk_source_rate() 379 struct mt8195_afe_private *afe_priv = afe->platform_priv; in mt8195_afe_init_clock() local 384 afe_priv->clk = in mt8195_afe_init_clock() 387 if (!afe_priv->clk) in mt8195_afe_init_clock() 391 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt8195_afe_init_clock() 392 if (IS_ERR(afe_priv->clk[i])) { in mt8195_afe_init_clock() 395 PTR_ERR(afe_priv->clk[i])); in mt8195_afe_init_clock() [all …]
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| A D | mt8195-dai-adda.c | 40 struct mt8195_afe_private *afe_priv = afe->platform_priv; in mt8195_adda_mtkaif_init() local 41 struct mtkaif_param *param = &afe_priv->mtkaif_params; in mt8195_adda_mtkaif_init() 186 struct mtkaif_param *param = &afe_priv->mtkaif_params; in mtk_adda_ul_event() 213 struct mtkaif_param *param = &afe_priv->mtkaif_params; in mtk_adda6_ul_event() 257 clk_parent = afe_priv->clk[MT8195_CLK_TOP_APLL1]; in mtk_audio_hires_event() 260 clk_parent = afe_priv->clk[MT8195_CLK_XTAL_26M]; in mtk_audio_hires_event() 285 return afe_priv->dai_priv[dai_id]; in get_adda_priv_by_name() 490 struct mtkaif_param *param = &afe_priv->mtkaif_params; in mt8195_adda6_only_get() 502 struct mtkaif_param *param = &afe_priv->mtkaif_params; in mt8195_adda6_only_set() 631 adda_priv = afe_priv->dai_priv[dai->id]; in mtk_dai_adda_hw_params() [all …]
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| A D | mt8195-dai-etdm.c | 276 etdm_data = afe_priv->dai_priv[dai->id]; in is_cowork_mode() 309 etdm_data = afe_priv->dai_priv[dai->id]; in get_etdm_cowork_master_id() 1327 etdm_data = afe_priv->dai_priv[dai_id]; in mt8195_afe_enable_etdm() 1354 etdm_data = afe_priv->dai_priv[dai_id]; in mt8195_afe_disable_etdm() 1419 etdm_data = afe_priv->dai_priv[dai_id]; in mt8195_etdm_sync_mode_configure() 1604 afe_priv->clk[cg_id]); in mtk_dai_etdm_startup() 1643 afe_priv->clk[cg_id]); in mtk_dai_etdm_shutdown() 1706 etdm_data = afe_priv->dai_priv[dai_id]; in mtk_dai_etdm_in_configure() 1948 afe_priv->clk[apll_clk_id]); in mtk_dai_etdm_mclk_configure() 2603 etdm_data = afe_priv->dai_priv[i]; in mt8195_etdm_update_sync_info() [all …]
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| /sound/soc/mediatek/mt8173/ |
| A D | mt8173-afe-pcm.c | 326 struct mt8173_afe_private *afe_priv = afe->platform_priv; in mt8173_afe_i2s_prepare() local 347 struct mt8173_afe_private *afe_priv = afe->platform_priv; in mt8173_afe_hdmi_startup() local 353 afe_priv->clocks[MT8173_CLK_I2S3_B]); in mt8173_afe_hdmi_startup() 361 struct mt8173_afe_private *afe_priv = afe->platform_priv; in mt8173_afe_hdmi_shutdown() local 367 afe_priv->clocks[MT8173_CLK_I2S3_B]); in mt8173_afe_hdmi_shutdown() 381 afe_priv->clocks[MT8173_CLK_I2S3_B], in mt8173_afe_hdmi_prepare() 1039 if (IS_ERR(afe_priv->clocks[i])) { in mt8173_afe_init_audio_clk() 1042 return PTR_ERR(afe_priv->clocks[i]); in mt8173_afe_init_audio_clk() 1055 struct mt8173_afe_private *afe_priv; in mt8173_afe_pcm_dev_probe() local 1068 afe_priv = afe->platform_priv; in mt8173_afe_pcm_dev_probe() [all …]
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| /sound/soc/mediatek/mt7986/ |
| A D | mt7986-afe-pcm.c | 327 sizeof(*afe_priv->clks), GFP_KERNEL); in mt7986_init_clock() 328 if (!afe_priv->clks) in mt7986_init_clock() 330 afe_priv->num_clks = CLK_NUM; in mt7986_init_clock() 332 for (i = 0; i < afe_priv->num_clks; i++) in mt7986_init_clock() 333 afe_priv->clks[i].id = aud_clks[i]; in mt7986_init_clock() 335 ret = devm_clk_bulk_get(afe->dev, afe_priv->num_clks, afe_priv->clks); in mt7986_init_clock() 404 clk_bulk_disable_unprepare(afe_priv->num_clks, afe_priv->clks); in mt7986_afe_runtime_suspend() 415 ret = clk_bulk_prepare_enable(afe_priv->num_clks, afe_priv->clks); in mt7986_afe_runtime_resume() 462 struct mt7986_afe_private *afe_priv; in mt7986_afe_pcm_dev_probe() local 476 afe_priv = afe->platform_priv; in mt7986_afe_pcm_dev_probe() [all …]
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| A D | mt7986-dai-etdm.c | 122 struct mt7986_afe_private *afe_priv = afe->platform_priv; in mtk_dai_etdm_startup() local 125 ret = clk_bulk_prepare_enable(afe_priv->num_clks, afe_priv->clks); in mtk_dai_etdm_startup() 139 struct mt7986_afe_private *afe_priv = afe->platform_priv; in mtk_dai_etdm_shutdown() local 146 clk_bulk_disable_unprepare(afe_priv->num_clks, afe_priv->clks); in mtk_dai_etdm_shutdown() 168 struct mt7986_afe_private *afe_priv = afe->platform_priv; in mtk_dai_etdm_config() local 169 struct mtk_dai_etdm_priv *etdm_data = afe_priv->dai_priv[dai->id]; in mtk_dai_etdm_config() 294 struct mt7986_afe_private *afe_priv = afe->platform_priv; in mtk_dai_etdm_set_fmt() local 312 afe_priv->dai_priv[dai->id] = priv_data; in mtk_dai_etdm_set_fmt() 313 etdm_data = afe_priv->dai_priv[dai->id]; in mtk_dai_etdm_set_fmt()
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