Searched refs:MSR_GS_BASE (Results 1 – 5 of 5) sorted by relevance
63 .base = MSR_GS_BASE,297 GUEST_ASSERT(rdmsr(MSR_GS_BASE) == MSR_GS_BASE); in guest_msr_calls()300 GUEST_ASSERT(rdmsr(MSR_GS_BASE) != MSR_GS_BASE); in guest_msr_calls()335 data = test_rdmsr(MSR_GS_BASE); in guest_code_permission_bitmap()336 GUEST_ASSERT(data != MSR_GS_BASE); in guest_code_permission_bitmap()343 data = test_rdmsr(MSR_GS_BASE); in guest_code_permission_bitmap()344 GUEST_ASSERT(data == MSR_GS_BASE); in guest_code_permission_bitmap()349 data = test_rdmsr(MSR_GS_BASE); in guest_code_permission_bitmap()350 GUEST_ASSERT(data != MSR_GS_BASE); in guest_code_permission_bitmap()418 case MSR_GS_BASE: in process_rdmsr()[all …]
43 rdmsr_from_l2(MSR_GS_BASE); /* not intercepted */ in l2_guest_code()45 rdmsr_from_l2(MSR_GS_BASE); /* intercepted */ in l2_guest_code()115 __set_bit(2 * (MSR_GS_BASE & 0x1fff), svm->msr + 0x800); in guest_code()
58 rdmsr_from_l2(MSR_GS_BASE); /* not intercepted */ in l2_guest_code()60 rdmsr_from_l2(MSR_GS_BASE); /* intercepted */ in l2_guest_code()156 __set_bit(MSR_GS_BASE & 0x1fff, vmx_pages->msr + 0x400); in guest_code()
275 vmwrite(HOST_GS_BASE, rdmsr(MSR_GS_BASE)); in init_vmcs_host_state()
16 #define MSR_GS_BASE 0xc0000101 /* 64bit GS base */ macro
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