1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright 2018 Linaro Ltd.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/interrupt-controller/jcore,aic.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: J-Core Advanced Interrupt Controller
9
10maintainers:
11  - Rich Felker <dalias@libc.org>
12
13properties:
14  compatible:
15    enum:
16      - jcore,aic1
17      - jcore,aic2
18
19  reg:
20    description: Memory region(s) for configuration. For SMP, there should be one
21      region per CPU, indexed by the sequential, zero-based hardware CPU number.
22
23  interrupt-controller: true
24
25  '#interrupt-cells':
26    const: 1
27
28required:
29  - compatible
30  - reg
31  - interrupt-controller
32  - '#interrupt-cells'
33
34additionalProperties: false
35
36examples:
37  - |
38    aic: interrupt-controller@200 {
39        compatible = "jcore,aic2";
40        reg = <0x200 0x30>, <0x500 0x30>;
41        interrupt-controller;
42        #interrupt-cells = <1>;
43    };
44