1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/marvell,ap806-sei.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Marvell SEI (System Error Interrupt) Controller
8
9maintainers:
10  - Miquel Raynal <miquel.raynal@bootlin.com>
11
12description: >
13  Marvell SEI (System Error Interrupt) controller is an interrupt aggregator. It
14  receives interrupts from several sources and aggregates them to a single
15  interrupt line (an SPI) on the parent interrupt controller.
16
17  This interrupt controller can handle up to 64 SEIs, a set comes from the AP
18  and is wired while a second set comes from the CPs by the mean of MSIs.
19
20properties:
21  compatible:
22    const: marvell,ap806-sei
23
24  reg:
25    maxItems: 1
26
27  interrupts:
28    maxItems: 1
29
30  '#interrupt-cells':
31    const: 1
32
33  interrupt-controller: true
34
35  msi-controller: true
36
37required:
38  - compatible
39  - reg
40  - interrupts
41  - '#interrupt-cells'
42  - interrupt-controller
43  - msi-controller
44
45additionalProperties: false
46
47examples:
48  - |
49    #include <dt-bindings/interrupt-controller/arm-gic.h>
50
51    interrupt-controller@3f0200 {
52        compatible = "marvell,ap806-sei";
53        reg = <0x3f0200 0x40>;
54        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
55        #interrupt-cells = <1>;
56        interrupt-controller;
57        msi-controller;
58    };
59