1 /*
2 * Copyright 2023 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23 #include "amdgpu.h"
24 #include "amdgpu_ras.h"
25 #include <uapi/linux/kfd_ioctl.h>
26
amdgpu_hdp_ras_sw_init(struct amdgpu_device * adev)27 int amdgpu_hdp_ras_sw_init(struct amdgpu_device *adev)
28 {
29 int err;
30 struct amdgpu_hdp_ras *ras;
31
32 if (!adev->hdp.ras)
33 return 0;
34
35 ras = adev->hdp.ras;
36 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block);
37 if (err) {
38 dev_err(adev->dev, "Failed to register hdp ras block!\n");
39 return err;
40 }
41
42 strcpy(ras->ras_block.ras_comm.name, "hdp");
43 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__HDP;
44 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
45 adev->hdp.ras_if = &ras->ras_block.ras_comm;
46
47 /* hdp ras follows amdgpu_ras_block_late_init_default for late init */
48 return 0;
49 }
50
amdgpu_hdp_generic_flush(struct amdgpu_device * adev,struct amdgpu_ring * ring)51 void amdgpu_hdp_generic_flush(struct amdgpu_device *adev,
52 struct amdgpu_ring *ring)
53 {
54 if (!ring || !ring->funcs->emit_wreg) {
55 WREG32((adev->rmmio_remap.reg_offset +
56 KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >>
57 2,
58 0);
59 if (adev->nbio.funcs->get_memsize)
60 adev->nbio.funcs->get_memsize(adev);
61 } else {
62 amdgpu_ring_emit_wreg(ring,
63 (adev->rmmio_remap.reg_offset +
64 KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >>
65 2,
66 0);
67 }
68 }
69