1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2016 MediaTek Inc. 4 * Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com> 5 * Rick Chang <rick.chang@mediatek.com> 6 * Xia Jiang <xia.jiang@mediatek.com> 7 */ 8 9 #ifndef _MTK_JPEG_CORE_H 10 #define _MTK_JPEG_CORE_H 11 12 #include <linux/clk.h> 13 #include <linux/interrupt.h> 14 #include <media/v4l2-ctrls.h> 15 #include <media/v4l2-device.h> 16 #include <media/v4l2-fh.h> 17 #include <media/videobuf2-v4l2.h> 18 19 #include "mtk_jpeg_dec_hw.h" 20 21 #define MTK_JPEG_NAME "mtk-jpeg" 22 23 #define MTK_JPEG_FMT_FLAG_OUTPUT BIT(0) 24 #define MTK_JPEG_FMT_FLAG_CAPTURE BIT(1) 25 26 #define MTK_JPEG_MIN_WIDTH 32U 27 #define MTK_JPEG_MIN_HEIGHT 32U 28 #define MTK_JPEG_MAX_WIDTH 65535U 29 #define MTK_JPEG_MAX_HEIGHT 65535U 30 31 #define MTK_JPEG_DEFAULT_SIZEIMAGE (1 * 1024 * 1024) 32 33 #define MTK_JPEG_HW_TIMEOUT_MSEC 1000 34 35 #define MTK_JPEG_MAX_EXIF_SIZE (64 * 1024) 36 37 #define MTK_JPEG_ADDR_MASK GENMASK(1, 0) 38 39 /** 40 * enum mtk_jpeg_ctx_state - states of the context state machine 41 * @MTK_JPEG_INIT: current state is initialized 42 * @MTK_JPEG_RUNNING: current state is running 43 * @MTK_JPEG_SOURCE_CHANGE: current state is source resolution change 44 */ 45 enum mtk_jpeg_ctx_state { 46 MTK_JPEG_INIT = 0, 47 MTK_JPEG_RUNNING, 48 MTK_JPEG_SOURCE_CHANGE, 49 }; 50 51 /** 52 * struct mtk_jpeg_variant - mtk jpeg driver variant 53 * @clks: clock names 54 * @num_clks: numbers of clock 55 * @formats: jpeg driver's internal color format 56 * @num_formats: number of formats 57 * @qops: the callback of jpeg vb2_ops 58 * @irq_handler: jpeg irq handler callback 59 * @hw_reset: jpeg hardware reset callback 60 * @m2m_ops: the callback of jpeg v4l2_m2m_ops 61 * @dev_name: jpeg device name 62 * @ioctl_ops: the callback of jpeg v4l2_ioctl_ops 63 * @out_q_default_fourcc: output queue default fourcc 64 * @cap_q_default_fourcc: capture queue default fourcc 65 * @multi_core: mark jpeg hw is multi_core or not 66 * @jpeg_worker: jpeg dec or enc worker 67 * @support_34bit: flag to check support for 34-bit DMA address 68 */ 69 struct mtk_jpeg_variant { 70 struct clk_bulk_data *clks; 71 int num_clks; 72 struct mtk_jpeg_fmt *formats; 73 int num_formats; 74 const struct vb2_ops *qops; 75 irqreturn_t (*irq_handler)(int irq, void *priv); 76 void (*hw_reset)(void __iomem *base); 77 const struct v4l2_m2m_ops *m2m_ops; 78 const char *dev_name; 79 const struct v4l2_ioctl_ops *ioctl_ops; 80 u32 out_q_default_fourcc; 81 u32 cap_q_default_fourcc; 82 bool multi_core; 83 void (*jpeg_worker)(struct work_struct *work); 84 bool support_34bit; 85 }; 86 87 struct mtk_jpeg_src_buf { 88 u32 frame_num; 89 struct vb2_v4l2_buffer b; 90 struct list_head list; 91 u32 bs_size; 92 struct mtk_jpeg_dec_param dec_param; 93 94 struct mtk_jpeg_ctx *curr_ctx; 95 }; 96 97 enum mtk_jpeg_hw_state { 98 MTK_JPEG_HW_IDLE = 0, 99 MTK_JPEG_HW_BUSY = 1, 100 }; 101 102 struct mtk_jpeg_hw_param { 103 struct vb2_v4l2_buffer *src_buffer; 104 struct vb2_v4l2_buffer *dst_buffer; 105 struct mtk_jpeg_ctx *curr_ctx; 106 }; 107 108 enum mtk_jpegenc_hw_id { 109 MTK_JPEGENC_HW0, 110 MTK_JPEGENC_HW1, 111 MTK_JPEGENC_HW_MAX, 112 }; 113 114 enum mtk_jpegdec_hw_id { 115 MTK_JPEGDEC_HW0, 116 MTK_JPEGDEC_HW1, 117 MTK_JPEGDEC_HW2, 118 MTK_JPEGDEC_HW_MAX, 119 }; 120 121 /** 122 * struct mtk_jpegenc_clk - Structure used to store vcodec clock information 123 * @clks: JPEG encode clock 124 * @clk_num: JPEG encode clock numbers 125 */ 126 struct mtk_jpegenc_clk { 127 struct clk_bulk_data *clks; 128 int clk_num; 129 }; 130 131 /** 132 * struct mtk_jpegdec_clk - Structure used to store vcodec clock information 133 * @clks: JPEG decode clock 134 * @clk_num: JPEG decode clock numbers 135 */ 136 struct mtk_jpegdec_clk { 137 struct clk_bulk_data *clks; 138 int clk_num; 139 }; 140 141 /** 142 * struct mtk_jpegenc_comp_dev - JPEG COREX abstraction 143 * @dev: JPEG device 144 * @plat_dev: platform device data 145 * @reg_base: JPEG registers mapping 146 * @master_dev: mtk_jpeg_dev device 147 * @venc_clk: jpeg encode clock 148 * @jpegenc_irq: jpeg encode irq num 149 * @job_timeout_work: encode timeout workqueue 150 * @hw_param: jpeg encode hw parameters 151 * @hw_state: record hw state 152 * @hw_lock: spinlock protecting the hw device resource 153 */ 154 struct mtk_jpegenc_comp_dev { 155 struct device *dev; 156 struct platform_device *plat_dev; 157 void __iomem *reg_base; 158 struct mtk_jpeg_dev *master_dev; 159 struct mtk_jpegenc_clk venc_clk; 160 int jpegenc_irq; 161 struct delayed_work job_timeout_work; 162 struct mtk_jpeg_hw_param hw_param; 163 enum mtk_jpeg_hw_state hw_state; 164 /* spinlock protecting the hw device resource */ 165 spinlock_t hw_lock; 166 }; 167 168 /** 169 * struct mtk_jpegdec_comp_dev - JPEG COREX abstraction 170 * @dev: JPEG device 171 * @plat_dev: platform device data 172 * @reg_base: JPEG registers mapping 173 * @master_dev: mtk_jpeg_dev device 174 * @jdec_clk: mtk_jpegdec_clk 175 * @jpegdec_irq: jpeg decode irq num 176 * @job_timeout_work: decode timeout workqueue 177 * @hw_param: jpeg decode hw parameters 178 * @hw_state: record hw state 179 * @hw_lock: spinlock protecting hw 180 */ 181 struct mtk_jpegdec_comp_dev { 182 struct device *dev; 183 struct platform_device *plat_dev; 184 void __iomem *reg_base; 185 struct mtk_jpeg_dev *master_dev; 186 struct mtk_jpegdec_clk jdec_clk; 187 int jpegdec_irq; 188 struct delayed_work job_timeout_work; 189 struct mtk_jpeg_hw_param hw_param; 190 enum mtk_jpeg_hw_state hw_state; 191 /* spinlock protecting the hw device resource */ 192 spinlock_t hw_lock; 193 }; 194 195 /** 196 * struct mtk_jpeg_dev - JPEG IP abstraction 197 * @lock: the mutex protecting this structure 198 * @hw_lock: spinlock protecting the hw device resource 199 * @workqueue: decode work queue 200 * @dev: JPEG device 201 * @v4l2_dev: v4l2 device for mem2mem mode 202 * @m2m_dev: v4l2 mem2mem device data 203 * @alloc_ctx: videobuf2 memory allocator's context 204 * @vdev: video device node for jpeg mem2mem mode 205 * @reg_base: JPEG registers mapping 206 * @job_timeout_work: IRQ timeout structure 207 * @variant: driver variant to be used 208 * @reg_encbase: jpg encode register base addr 209 * @enc_hw_dev: jpg encode hardware device 210 * @hw_wq: jpg wait queue 211 * @hw_rdy: jpg hw ready flag 212 * @reg_decbase: jpg decode register base addr 213 * @dec_hw_dev: jpg decode hardware device 214 * @hw_index: jpg hw index 215 */ 216 struct mtk_jpeg_dev { 217 struct mutex lock; 218 spinlock_t hw_lock; 219 struct workqueue_struct *workqueue; 220 struct device *dev; 221 struct v4l2_device v4l2_dev; 222 struct v4l2_m2m_dev *m2m_dev; 223 void *alloc_ctx; 224 struct video_device *vdev; 225 void __iomem *reg_base; 226 struct delayed_work job_timeout_work; 227 const struct mtk_jpeg_variant *variant; 228 229 void __iomem *reg_encbase[MTK_JPEGENC_HW_MAX]; 230 struct mtk_jpegenc_comp_dev *enc_hw_dev[MTK_JPEGENC_HW_MAX]; 231 wait_queue_head_t hw_wq; 232 atomic_t hw_rdy; 233 234 void __iomem *reg_decbase[MTK_JPEGDEC_HW_MAX]; 235 struct mtk_jpegdec_comp_dev *dec_hw_dev[MTK_JPEGDEC_HW_MAX]; 236 atomic_t hw_index; 237 }; 238 239 /** 240 * struct mtk_jpeg_fmt - driver's internal color format data 241 * @fourcc: the fourcc code, 0 if not applicable 242 * @hw_format: hardware format value 243 * @h_sample: horizontal sample count of plane in 4 * 4 pixel image 244 * @v_sample: vertical sample count of plane in 4 * 4 pixel image 245 * @colplanes: number of color planes (1 for packed formats) 246 * @h_align: horizontal alignment order (align to 2^h_align) 247 * @v_align: vertical alignment order (align to 2^v_align) 248 * @flags: flags describing format applicability 249 */ 250 struct mtk_jpeg_fmt { 251 u32 fourcc; 252 u32 hw_format; 253 int h_sample[VIDEO_MAX_PLANES]; 254 int v_sample[VIDEO_MAX_PLANES]; 255 int colplanes; 256 int h_align; 257 int v_align; 258 u32 flags; 259 }; 260 261 /** 262 * struct mtk_jpeg_q_data - parameters of one queue 263 * @fmt: driver-specific format of this queue 264 * @pix_mp: multiplanar format 265 * @enc_crop_rect: jpeg encoder crop information 266 */ 267 struct mtk_jpeg_q_data { 268 struct mtk_jpeg_fmt *fmt; 269 struct v4l2_pix_format_mplane pix_mp; 270 struct v4l2_rect enc_crop_rect; 271 }; 272 273 /** 274 * struct mtk_jpeg_ctx - the device context data 275 * @jpeg: JPEG IP device for this context 276 * @out_q: source (output) queue information 277 * @cap_q: destination queue information 278 * @fh: V4L2 file handle 279 * @state: state of the context 280 * @enable_exif: enable exif mode of jpeg encoder 281 * @enc_quality: jpeg encoder quality 282 * @restart_interval: jpeg encoder restart interval 283 * @ctrl_hdl: controls handler 284 * @jpeg_work: jpeg encoder workqueue 285 * @total_frame_num: encoded frame number 286 * @dst_done_queue: encoded frame buffer queue 287 * @done_queue_lock: encoded frame operation spinlock 288 * @last_done_frame_num: the last encoded frame number 289 */ 290 struct mtk_jpeg_ctx { 291 struct mtk_jpeg_dev *jpeg; 292 struct mtk_jpeg_q_data out_q; 293 struct mtk_jpeg_q_data cap_q; 294 struct v4l2_fh fh; 295 enum mtk_jpeg_ctx_state state; 296 bool enable_exif; 297 u8 enc_quality; 298 u8 restart_interval; 299 struct v4l2_ctrl_handler ctrl_hdl; 300 301 struct work_struct jpeg_work; 302 u32 total_frame_num; 303 struct list_head dst_done_queue; 304 /* spinlock protecting the encode done buffer */ 305 spinlock_t done_queue_lock; 306 u32 last_done_frame_num; 307 }; 308 309 #endif /* _MTK_JPEG_CORE_H */ 310