1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * SHA-512 and SHA-384 using the RISC-V vector crypto extensions
4 *
5 * Copyright (C) 2023 VRULL GmbH
6 * Author: Heiko Stuebner <heiko.stuebner@vrull.eu>
7 *
8 * Copyright (C) 2023 SiFive, Inc.
9 * Author: Jerry Shih <jerry.shih@sifive.com>
10 */
11
12 #include <asm/simd.h>
13 #include <asm/vector.h>
14 #include <crypto/internal/simd.h>
15
16 static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_extensions);
17
18 asmlinkage void sha512_transform_zvknhb_zvkb(struct sha512_block_state *state,
19 const u8 *data, size_t nblocks);
20
sha512_blocks(struct sha512_block_state * state,const u8 * data,size_t nblocks)21 static void sha512_blocks(struct sha512_block_state *state,
22 const u8 *data, size_t nblocks)
23 {
24 if (static_branch_likely(&have_extensions) &&
25 likely(crypto_simd_usable())) {
26 kernel_vector_begin();
27 sha512_transform_zvknhb_zvkb(state, data, nblocks);
28 kernel_vector_end();
29 } else {
30 sha512_blocks_generic(state, data, nblocks);
31 }
32 }
33
34 #define sha512_mod_init_arch sha512_mod_init_arch
sha512_mod_init_arch(void)35 static inline void sha512_mod_init_arch(void)
36 {
37 if (riscv_isa_extension_available(NULL, ZVKNHB) &&
38 riscv_isa_extension_available(NULL, ZVKB) &&
39 riscv_vector_vlen() >= 128)
40 static_branch_enable(&have_extensions);
41 }
42