Lines Matching refs:i
119 for (size_t i = 0; i < indent; i++) { in dump() local
130 for (size_t i = 0; i < indent + 1; i++) { in dump() local
349 for (size_t i=0; i < num_bars; i++) { in load_bars() local
350 bars_[i] = {}; in load_bars()
351 uint64_t bar_addr = config_.type0.base_addresses[i]; in load_bars()
354 bars_[i].io = true; in load_bars()
355 bars_[i].prefetchable = false; in load_bars()
356 bars_[i].size_64 = false; in load_bars()
357 bars_[i].addr = bar_addr & ~0x3; in load_bars()
361 pci_write_config_word(loc_, PCI_CONFIG_BASE_ADDRESSES + i * 4, 0xffff); in load_bars()
362 pci_read_config_word(loc_, PCI_CONFIG_BASE_ADDRESSES + i * 4, &size); in load_bars()
363 pci_write_config_word(loc_, PCI_CONFIG_BASE_ADDRESSES + i * 4, bars_[i].addr); in load_bars()
366 bars_[i].size = ((size & ~0b11) ^ 0xffff) + 1; in load_bars()
368 bars_[i].valid = (bars_[i].size != 0); in load_bars()
371 bars_[i].io = false; in load_bars()
372 bars_[i].prefetchable = bar_addr & (1<<3); in load_bars()
373 bars_[i].size_64 = false; in load_bars()
374 bars_[i].addr = bar_addr & ~0xf; in load_bars()
378 pci_write_config_word(loc_, PCI_CONFIG_BASE_ADDRESSES + i * 4, 0xffffffff); in load_bars()
379 pci_read_config_word(loc_, PCI_CONFIG_BASE_ADDRESSES + i * 4, &size); in load_bars()
380 pci_write_config_word(loc_, PCI_CONFIG_BASE_ADDRESSES + i * 4, bars_[i].addr); in load_bars()
383 bars_[i].size = (~(size & ~0b1111)) + 1; in load_bars()
385 bars_[i].valid = (bars_[i].size != 0); in load_bars()
388 if (i >= num_bars - 1) { in load_bars()
393 bars_[i].io = false; in load_bars()
394 bars_[i].prefetchable = bar_addr & (1<<3); in load_bars()
395 bars_[i].size_64 = true; in load_bars()
396 bars_[i].addr = bar_addr & ~0xf; in load_bars()
397 bars_[i].addr |= (uint64_t)config_.type0.base_addresses[i + 1] << 32; in load_bars()
402 pci_write_config_word(loc_, PCI_CONFIG_BASE_ADDRESSES + i * 4, 0xffffffff); in load_bars()
403 pci_read_config_word(loc_, PCI_CONFIG_BASE_ADDRESSES + i * 4, &size32); in load_bars()
405 pci_write_config_word(loc_, PCI_CONFIG_BASE_ADDRESSES + i * 4 + 4, 0xffffffff); in load_bars()
406 pci_read_config_word(loc_, PCI_CONFIG_BASE_ADDRESSES + i * 4 + 4, &size32); in load_bars()
408 pci_write_config_word(loc_, PCI_CONFIG_BASE_ADDRESSES + i * 4, bars_[i].addr); in load_bars()
409 pci_write_config_word(loc_, PCI_CONFIG_BASE_ADDRESSES + i * 4 + 4, bars_[i].addr >> 32); in load_bars()
412 bars_[i].size = (~(size & ~(uint64_t)0b1111)) + 1; in load_bars()
414 bars_[i].valid = (bars_[i].size != 0); in load_bars()
417 i++; in load_bars()
418 bars_[i] = {}; // clears the valid bit in load_bars()
445 for (auto i = 0; i < 6; i++) { in compute_bar_sizes() local
446 const auto &bar = bars_[i]; in compute_bar_sizes()
503 for (auto i = 0; i < 6; i++) { in get_bar_alloc_requests() local
504 const auto &bar = bars_[i]; in get_bar_alloc_requests()
513 request->bar_num = i; in get_bar_alloc_requests()