/* * @brief I2CS bus slave example using interrupt mode * * @note * Copyright(C) NXP Semiconductors, 2014 * All rights reserved. * * @par * Software that is described herein is for illustrative purposes only * which provides customers with programming information regarding the * LPC products. This software is supplied "AS IS" without any warranties of * any kind, and NXP Semiconductors and its licensor disclaim any and * all warranties, express or implied, including all implied warranties of * merchantability, fitness for a particular purpose and non-infringement of * intellectual property rights. NXP Semiconductors assumes no responsibility * or liability for the use of the software, conveys no license or rights under any * patent, copyright, mask work right, or any other intellectual property rights in * or to any products. NXP Semiconductors reserves the right to make changes * in the software without notification. NXP Semiconductors also makes no * representation or warranty that such application will be suitable for the * specified use without further testing or modification. * * @par * Permission to use, copy, modify, and distribute this software and its * documentation is hereby granted, under NXP Semiconductors' and its * licensor's relevant copyrights in the software, without fee, provided that it * is used in conjunction with NXP Semiconductors microcontrollers. This * copyright, permission, and disclaimer notice must appear in all copies of * this code. */ /** @defgroup EXAMPLES_PERIPH_15XX_I2CSINT LPC15xx I2CS bus slave example using interrupts * @ingroup EXAMPLES_PERIPH_15XX * Example description
* This example shows how to configure I2C as a bus slave in interrupt mode using * the I2CS driver.
* * This example provides 2 simple (emulated) EEPROMs at different I2C slave * addresses. Both are on the same I2C bus, but the slave controller will be * configured to support 2 slave addresses on the single bus. The emulated * EEPROMs have their memory locations set and read via I2C write and read * operations. Operations can be as little as a byte or continuous until the * master terminates the transfer. The following operations are supported:
* - Write 16-bit address
* - Write 16-bit address READ READ ... READ (unbound read)
* - Write 16-bit address WRITE WRITE ... WRITE (unbound write)
* - READ READ ... READ (unbound read)
* Note: Slave address is 0x28.
* * Unbound read oeprations have no limit on size and will go as long as the master * requests or sends data. If the end of emulated EEPROM is reached, the EEPROM address * will wrap. All reads and write operations auto-increment. Read operations without a * 16-bit address will use the last incremented address.
* * The I2C slave processing is handled entirely in the I2C slave interrupt handler. * This example doesn't use the Chip_I2CS_Xfer() function and implements the slave * support inside the I2C interrupt handler in real-time.
* * The example also provides the master interface on the same I2C bus as the slave * to communicate the the emulated EEPROMs without requiring an external I2C master.
* * Special connection requirements
* No special requirements are needed for this example.
* * Build procedures:
* Visit the LPCOpen quickstart guides * to get started building LPCOpen projects. * * Supported boards and board setup:
* @ref LPCOPEN_15XX_BOARD_LPCXPRESSO_1549
* * Submitting LPCOpen issues:
* @ref LPCOPEN_COMMUNITY * @{ */ /** * @} */