1 /******************************************************************************
2 * Filename: i2c.h
3 * Revised: 2015-09-21 15:19:36 +0200 (Mon, 21 Sep 2015)
4 * Revision: 44629
5 *
6 * Description: Defines and prototypes for the I2C.
7 *
8 * Copyright (c) 2015, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 * be used to endorse or promote products derived from this software without
23 * specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 ******************************************************************************/
38
39 //*****************************************************************************
40 //
41 //! \addtogroup peripheral_group
42 //! @{
43 //! \addtogroup i2c_api
44 //! @{
45 //
46 //*****************************************************************************
47
48 #ifndef __I2C_H__
49 #define __I2C_H__
50
51 //*****************************************************************************
52 //
53 // If building with a C++ compiler, make all of the definitions in this header
54 // have a C binding.
55 //
56 //*****************************************************************************
57 #ifdef __cplusplus
58 extern "C"
59 {
60 #endif
61
62 #include <stdbool.h>
63 #include <stdint.h>
64 #include <inc/hw_types.h>
65 #include <inc/hw_ints.h>
66 #include <inc/hw_memmap.h>
67 #include <inc/hw_i2c.h>
68 #include <inc/hw_sysctl.h>
69 #include <driverlib/debug.h>
70 #include <driverlib/interrupt.h>
71 #include <driverlib/cpu.h>
72
73 //*****************************************************************************
74 //
75 // Support for DriverLib in ROM:
76 // This section renames all functions that are not "static inline", so that
77 // calling these functions will default to implementation in flash. At the end
78 // of this file a second renaming will change the defaults to implementation in
79 // ROM for available functions.
80 //
81 // To force use of the implementation in flash, e.g. for debugging:
82 // - Globally: Define DRIVERLIB_NOROM at project level
83 // - Per function: Use prefix "NOROM_" when calling the function
84 //
85 //*****************************************************************************
86 #if !defined(DOXYGEN)
87 #define I2CMasterInitExpClk NOROM_I2CMasterInitExpClk
88 #define I2CMasterErr NOROM_I2CMasterErr
89 #define I2CIntRegister NOROM_I2CIntRegister
90 #define I2CIntUnregister NOROM_I2CIntUnregister
91 #endif
92
93 //*****************************************************************************
94 //
95 // I2C Master commands
96 //
97 //*****************************************************************************
98 #define I2C_MASTER_CMD_SINGLE_SEND \
99 0x00000007
100 #define I2C_MASTER_CMD_SINGLE_RECEIVE \
101 0x00000007
102 #define I2C_MASTER_CMD_BURST_SEND_START \
103 0x00000003
104 #define I2C_MASTER_CMD_BURST_SEND_CONT \
105 0x00000001
106 #define I2C_MASTER_CMD_BURST_SEND_FINISH \
107 0x00000005
108 #define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP \
109 0x00000004
110 #define I2C_MASTER_CMD_BURST_RECEIVE_START \
111 0x0000000b
112 #define I2C_MASTER_CMD_BURST_RECEIVE_CONT \
113 0x00000009
114 #define I2C_MASTER_CMD_BURST_RECEIVE_FINISH \
115 0x00000005
116 #define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP \
117 0x00000004
118
119 //*****************************************************************************
120 //
121 // I2C Master error status
122 //
123 //*****************************************************************************
124 #define I2C_MASTER_ERR_NONE 0
125 #define I2C_MASTER_ERR_ADDR_ACK 0x00000004
126 #define I2C_MASTER_ERR_DATA_ACK 0x00000008
127 #define I2C_MASTER_ERR_ARB_LOST 0x00000010
128
129 //*****************************************************************************
130 //
131 // I2C Slave action requests
132 //
133 //*****************************************************************************
134 #define I2C_SLAVE_ACT_NONE 0
135 #define I2C_SLAVE_ACT_RREQ 0x00000001 // Master has sent data
136 #define I2C_SLAVE_ACT_TREQ 0x00000002 // Master has requested data
137 #define I2C_SLAVE_ACT_RREQ_FBR 0x00000005 // Master has sent first byte
138
139 //*****************************************************************************
140 //
141 // I2C Slave interrupts
142 //
143 //*****************************************************************************
144 #define I2C_SLAVE_INT_STOP 0x00000004 // Stop Condition Interrupt.
145 #define I2C_SLAVE_INT_START 0x00000002 // Start Condition Interrupt.
146 #define I2C_SLAVE_INT_DATA 0x00000001 // Data Interrupt.
147
148 //*****************************************************************************
149 //
150 // API Functions and prototypes
151 //
152 //*****************************************************************************
153
154 #ifdef DRIVERLIB_DEBUG
155 //*****************************************************************************
156 //
157 //! \internal
158 //!
159 //! \brief Checks an I2C base address.
160 //!
161 //! This function determines if a I2C port base address is valid.
162 //!
163 //! \param ui32Base is the base address of the I2C port.
164 //!
165 //! \return Returns \c true if the base address is valid and \c false
166 //! otherwise
167 //
168 //*****************************************************************************
169 static bool
I2CBaseValid(uint32_t ui32Base)170 I2CBaseValid(uint32_t ui32Base)
171 {
172 return(ui32Base == I2C0_BASE);
173 }
174 #endif
175
176 //*****************************************************************************
177 //
178 //! \brief Initializes the I2C Master block.
179 //!
180 //! This function initializes operation of the I2C Master block. Upon
181 //! successful initialization of the I2C block, this function will have set the
182 //! bus speed for the master, and will have enabled the I2C Master block.
183 //!
184 //! If the parameter \c bFast is \c true, then the master block will be set up
185 //! to transfer data at 400 kbps; otherwise, it will be set up to transfer data
186 //! at 100 kbps.
187 //!
188 //!
189 //! \param ui32Base is the base address of the I2C module.
190 //! \param ui32I2CClk is the rate of the clock supplied to the I2C module.
191 //! \param bFast set up for fast data transfers.
192 //!
193 //! \return None
194 //
195 //*****************************************************************************
196 extern void I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32I2CClk,
197 bool bFast);
198
199 //*****************************************************************************
200 //
201 //! \brief Controls the state of the I2C Master module.
202 //!
203 //! This function is used to control the state of the Master module send and
204 //! receive operations.
205 //!
206 //! \param ui32Base is the base address of the I2C module.
207 //! \param ui32Cmd is the command to be issued by the I2C Master module
208 //! The parameter can be one of the following values:
209 //! - \ref I2C_MASTER_CMD_SINGLE_SEND
210 //! - \ref I2C_MASTER_CMD_SINGLE_RECEIVE
211 //! - \ref I2C_MASTER_CMD_BURST_SEND_START
212 //! - \ref I2C_MASTER_CMD_BURST_SEND_CONT
213 //! - \ref I2C_MASTER_CMD_BURST_SEND_FINISH
214 //! - \ref I2C_MASTER_CMD_BURST_SEND_ERROR_STOP
215 //! - \ref I2C_MASTER_CMD_BURST_RECEIVE_START
216 //! - \ref I2C_MASTER_CMD_BURST_RECEIVE_CONT
217 //! - \ref I2C_MASTER_CMD_BURST_RECEIVE_FINISH
218 //! - \ref I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP
219 //!
220 //! \return None
221 //
222 //*****************************************************************************
223 __STATIC_INLINE void
I2CMasterControl(uint32_t ui32Base,uint32_t ui32Cmd)224 I2CMasterControl(uint32_t ui32Base, uint32_t ui32Cmd)
225 {
226 //
227 // Check the arguments.
228 //
229 ASSERT(I2CBaseValid(ui32Base));
230 ASSERT((ui32Cmd == I2C_MASTER_CMD_SINGLE_SEND) ||
231 // (ui32Cmd == I2C_MASTER_CMD_SINGLE_RECEIVE) || -> Equal to SINGLE_SEND
232 (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_START) ||
233 (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_CONT) ||
234 (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_FINISH) ||
235 (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_ERROR_STOP) ||
236 (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_START) ||
237 (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_CONT) ||
238 (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_FINISH) ||
239 (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP));
240
241 //
242 // Send the command.
243 //
244 HWREG(I2C0_BASE + I2C_O_MCTRL) = ui32Cmd;
245
246 //
247 // Delay minimum four cycles in order to ensure that the I2C_O_MSTAT
248 // register has been correctly updated before function exit
249 //
250 CPUdelay(2);
251 }
252
253 //*****************************************************************************
254 //
255 //! \brief Sets the address that the I2C Master will place on the bus.
256 //!
257 //! This function will set the address that the I2C Master will place on the
258 //! bus when initiating a transaction. When the \e bReceive parameter is set
259 //! to \b true, the address will indicate that the I2C Master is initiating a
260 //! read from the slave; otherwise the address will indicate that the I2C
261 //! Master is initiating a write to the slave.
262 //!
263 //! \param ui32Base is the base address of the I2C module.
264 //! \param ui8SlaveAddr is a 7-bit slave address
265 //! \param bReceive flag indicates the type of communication with the slave.
266 //! - \c true : I2C Master is initiating a read from the slave.
267 //! - \c false : I2C Master is initiating a write to the slave.
268 //!
269 //! \return None
270 //
271 //*****************************************************************************
272 __STATIC_INLINE void
I2CMasterSlaveAddrSet(uint32_t ui32Base,uint8_t ui8SlaveAddr,bool bReceive)273 I2CMasterSlaveAddrSet(uint32_t ui32Base, uint8_t ui8SlaveAddr,
274 bool bReceive)
275 {
276 //
277 // Check the arguments.
278 //
279 ASSERT(I2CBaseValid(ui32Base));
280 ASSERT(!(ui8SlaveAddr & 0x80));
281
282 //
283 // Set the address of the slave with which the master will communicate.
284 //
285 HWREG(I2C0_BASE + I2C_O_MSA) = (ui8SlaveAddr << 1) | bReceive;
286 }
287
288 //*****************************************************************************
289 //
290 //! \brief Enables the I2C Master block.
291 //!
292 //! This will enable operation of the I2C Master block.
293 //!
294 //! \param ui32Base is the base address of the I2C module.
295 //!
296 //! \return None
297 //
298 //*****************************************************************************
299 __STATIC_INLINE void
I2CMasterEnable(uint32_t ui32Base)300 I2CMasterEnable(uint32_t ui32Base)
301 {
302 // Check the arguments.
303 ASSERT(I2CBaseValid(ui32Base));
304
305 // Enable the clock for the master.
306 HWREGBITW(I2C0_BASE + I2C_O_MCR, I2C_MCR_MFE_BITN) = 1;
307
308 // Enable the master block.
309 HWREG(I2C0_BASE + I2C_O_MCTRL) = I2C_MCTRL_RUN;
310 }
311
312 //*****************************************************************************
313 //
314 //! \brief Disables the I2C master block.
315 //!
316 //! This will disable operation of the I2C master block.
317 //!
318 //! \param ui32Base is the base address of the I2C module.
319 //!
320 //! \return None
321 //
322 //*****************************************************************************
323 __STATIC_INLINE void
I2CMasterDisable(uint32_t ui32Base)324 I2CMasterDisable(uint32_t ui32Base)
325 {
326 // Check the arguments.
327 ASSERT(I2CBaseValid(ui32Base));
328
329 // Disable the master block.
330 HWREG(I2C0_BASE + I2C_O_MCTRL) = 0;
331
332 // Disable the clock for the master.
333 HWREGBITW(I2C0_BASE + I2C_O_MCR, I2C_MCR_MFE_BITN) = 0;
334 }
335
336 //*****************************************************************************
337 //
338 //! \brief Indicates whether or not the I2C Master is busy.
339 //!
340 //! This function returns an indication of whether or not the I2C Master is
341 //! busy transmitting or receiving data.
342 //!
343 //! \param ui32Base is the base address of the I2C module.
344 //!
345 //! \return Returns status of I2C Master:
346 //! - \c true : I2C Master is busy.
347 //! - \c false : I2C Master is not busy.
348 //
349 //*****************************************************************************
350 __STATIC_INLINE bool
I2CMasterBusy(uint32_t ui32Base)351 I2CMasterBusy(uint32_t ui32Base)
352 {
353 //
354 // Check the arguments.
355 //
356 ASSERT(I2CBaseValid(ui32Base));
357
358 //
359 // Return the busy status.
360 //
361 if(HWREG(I2C0_BASE + I2C_O_MSTAT) & I2C_MSTAT_BUSY)
362 {
363 return(true);
364 }
365 else
366 {
367 return(false);
368 }
369 }
370
371 //*****************************************************************************
372 //
373 //! \brief Indicates whether or not the I2C bus is busy.
374 //!
375 //! This function returns an indication of whether or not the I2C bus is busy.
376 //! This function can be used in a multi-master environment to determine if
377 //! another master is currently using the bus.
378 //!
379 //! \param ui32Base is the base address of the I2C module.
380 //!
381 //! \return Returns status of the I2C bus:
382 //! - \c true : I2C bus is busy.
383 //! - \c false : I2C bus is not busy.
384 //
385 //*****************************************************************************
386 __STATIC_INLINE bool
I2CMasterBusBusy(uint32_t ui32Base)387 I2CMasterBusBusy(uint32_t ui32Base)
388 {
389 //
390 // Check the arguments.
391 //
392 ASSERT(I2CBaseValid(ui32Base));
393
394 //
395 // Return the bus busy status.
396 //
397 if(HWREG(I2C0_BASE + I2C_O_MSTAT) & I2C_MSTAT_BUSBSY)
398 {
399 return(true);
400 }
401 else
402 {
403 return(false);
404 }
405 }
406
407 //*****************************************************************************
408 //
409 //! \brief Receives a byte that has been sent to the I2C Master.
410 //!
411 //! This function reads a byte of data from the I2C Master Data Register.
412 //!
413 //! \param ui32Base is the base address of the I2C module.
414 //!
415 //! \return Returns the byte received from by the I2C Master, cast as an
416 //! uint32_t.
417 //
418 //*****************************************************************************
419 __STATIC_INLINE uint32_t
I2CMasterDataGet(uint32_t ui32Base)420 I2CMasterDataGet(uint32_t ui32Base)
421 {
422 //
423 // Check the arguments.
424 //
425 ASSERT(I2CBaseValid(ui32Base));
426
427 //
428 // Read a byte.
429 //
430 return(HWREG(I2C0_BASE + I2C_O_MDR));
431 }
432
433 //*****************************************************************************
434 //
435 //! \brief Transmits a byte from the I2C Master.
436 //!
437 //! This function will place the supplied data into I2C Master Data Register.
438 //!
439 //! \param ui32Base is the base address of the I2C module.
440 //! \param ui8Data is the data to be transmitted by the I2C Master
441 //!
442 //! \return None
443 //
444 //*****************************************************************************
445 __STATIC_INLINE void
I2CMasterDataPut(uint32_t ui32Base,uint8_t ui8Data)446 I2CMasterDataPut(uint32_t ui32Base, uint8_t ui8Data)
447 {
448 //
449 // Check the arguments.
450 //
451 ASSERT(I2CBaseValid(ui32Base));
452
453 //
454 // Write the byte.
455 //
456 HWREG(I2C0_BASE + I2C_O_MDR) = ui8Data;
457 }
458
459 //*****************************************************************************
460 //
461 //! \brief Gets the error status of the I2C Master module.
462 //!
463 //! This function is used to obtain the error status of the Master module send
464 //! and receive operations.
465 //!
466 //! \param ui32Base is the base address of the I2C module.
467 //!
468 //! \return Returns the error status of the Master module:
469 //! - \ref I2C_MASTER_ERR_NONE
470 //! - \ref I2C_MASTER_ERR_ADDR_ACK
471 //! - \ref I2C_MASTER_ERR_DATA_ACK
472 //! - \ref I2C_MASTER_ERR_ARB_LOST
473 //
474 //*****************************************************************************
475 extern uint32_t I2CMasterErr(uint32_t ui32Base);
476
477 //*****************************************************************************
478 //
479 //! \brief Enables the I2C Master interrupt.
480 //!
481 //! Enables the I2C Master interrupt source.
482 //!
483 //! \param ui32Base is the base address of the I2C module.
484 //!
485 //! \return None
486 //
487 //*****************************************************************************
488 __STATIC_INLINE void
I2CMasterIntEnable(uint32_t ui32Base)489 I2CMasterIntEnable(uint32_t ui32Base)
490 {
491 //
492 // Check the arguments.
493 //
494 ASSERT(I2CBaseValid(ui32Base));
495
496 //
497 // Enable the master interrupt.
498 //
499 HWREG(I2C0_BASE + I2C_O_MIMR) = I2C_MIMR_IM;
500 }
501
502 //*****************************************************************************
503 //
504 //! \brief Disables the I2C Master interrupt.
505 //!
506 //! Disables the I2C Master interrupt source.
507 //!
508 //! \param ui32Base is the base address of the I2C module.
509 //!
510 //! \return None
511 //
512 //*****************************************************************************
513 __STATIC_INLINE void
I2CMasterIntDisable(uint32_t ui32Base)514 I2CMasterIntDisable(uint32_t ui32Base)
515 {
516 //
517 // Check the arguments.
518 //
519 ASSERT(I2CBaseValid(ui32Base));
520
521 //
522 // Disable the master interrupt.
523 //
524 HWREG(I2C0_BASE + I2C_O_MIMR) = 0;
525 }
526
527 //*****************************************************************************
528 //
529 //! \brief Clears I2C Master interrupt sources.
530 //!
531 //! The I2C Master interrupt source is cleared, so that it no longer asserts.
532 //! This must be done in the interrupt handler to keep it from being called
533 //! again immediately upon exit.
534 //!
535 //! \note Due to write buffers and synchronizers in the system it may take several
536 //! clock cycles from a register write clearing an event in a module and until the
537 //! event is actually cleared in the NVIC of the system CPU. It is recommended to
538 //! clear the event source early in the interrupt service routine (ISR) to allow
539 //! the event clear to propagate to the NVIC before returning from the ISR.
540 //! At the same time, an early event clear allows new events of the same type to be
541 //! pended instead of ignored if the event is cleared later in the ISR.
542 //! It is the responsibility of the programmer to make sure that enough time has passed
543 //! before returning from the ISR to avoid false re-triggering of the cleared event.
544 //! A simple, although not necessarily optimal, way of clearing an event before
545 //! returning from the ISR is:
546 //! -# Write to clear event (interrupt source). (buffered write)
547 //! -# Dummy read from the event source module. (making sure the write has propagated)
548 //! -# Wait two system CPU clock cycles (user code or two NOPs). (allowing cleared event to propagate through any synchronizers)
549 //!
550 //! \param ui32Base is the base address of the I2C module.
551 //!
552 //! \return None
553 //
554 //*****************************************************************************
555 __STATIC_INLINE void
I2CMasterIntClear(uint32_t ui32Base)556 I2CMasterIntClear(uint32_t ui32Base)
557 {
558 //
559 // Check the arguments.
560 //
561 ASSERT(I2CBaseValid(ui32Base));
562
563 //
564 // Clear the I2C master interrupt source.
565 //
566 HWREG(I2C0_BASE + I2C_O_MICR) = I2C_MICR_IC;
567 }
568
569 //*****************************************************************************
570 //
571 //! \brief Gets the current I2C Master interrupt status.
572 //!
573 //! This returns the interrupt status for the I2C Master module. Either the
574 //! raw interrupt status or the status of interrupts that are allowed to
575 //! reflect to the processor can be returned.
576 //!
577 //! \param ui32Base is the base address of the I2C Master module.
578 //! \param bMasked selects either raw or masked interrupt status.
579 //! - \c false : Raw interrupt status is requested.
580 //! - \c true : Masked interrupt status is requested.
581 //!
582 //! \return Returns the current interrupt status.
583 //! - \c true : Active.
584 //! - \c false : Not active.
585 //
586 //*****************************************************************************
587 __STATIC_INLINE bool
I2CMasterIntStatus(uint32_t ui32Base,bool bMasked)588 I2CMasterIntStatus(uint32_t ui32Base, bool bMasked)
589 {
590 //
591 // Check the arguments.
592 //
593 ASSERT(I2CBaseValid(ui32Base));
594
595 //
596 // Return either the interrupt status or the raw interrupt status as
597 // requested.
598 //
599 if(bMasked)
600 {
601 return((HWREG(I2C0_BASE + I2C_O_MMIS)) ? true : false);
602 }
603 else
604 {
605 return((HWREG(I2C0_BASE + I2C_O_MRIS)) ? true : false);
606 }
607 }
608
609 //*****************************************************************************
610 //
611 //! \brief Enables the I2C Slave block.
612 //!
613 //! This will enable operation of the I2C Slave block.
614 //!
615 //! \param ui32Base is the base address of the I2C Slave module.
616 //!
617 //! \return None
618 //
619 //*****************************************************************************
620 __STATIC_INLINE void
I2CSlaveEnable(uint32_t ui32Base)621 I2CSlaveEnable(uint32_t ui32Base)
622 {
623 // Check the arguments.
624 ASSERT(I2CBaseValid(ui32Base));
625
626 // Enable the clock to the slave block.
627 HWREGBITW(I2C0_BASE + I2C_O_MCR, I2C_MCR_SFE_BITN) = 1;
628
629 // Enable the slave.
630 HWREG(I2C0_BASE + I2C_O_SCTL) = I2C_SCTL_DA;
631 }
632
633 //*****************************************************************************
634 //
635 //! \brief Initializes the I2C Slave block.
636 //!
637 //! This function initializes operation of the I2C Slave block. Upon
638 //! successful initialization of the I2C blocks, this function will have set
639 //! the slave address and have enabled the I2C Slave block.
640 //!
641 //! The parameter \c ui8SlaveAddr is the value that will be compared against the
642 //! slave address sent by an I2C master.
643 //!
644 //! \param ui32Base is the base address of the I2C Slave module.
645 //! \param ui8SlaveAddr is the 7-bit slave address.
646 //!
647 //! \return None
648 //
649 //*****************************************************************************
650 __STATIC_INLINE void
I2CSlaveInit(uint32_t ui32Base,uint8_t ui8SlaveAddr)651 I2CSlaveInit(uint32_t ui32Base, uint8_t ui8SlaveAddr)
652 {
653 //
654 // Check the arguments.
655 //
656 ASSERT(I2CBaseValid(ui32Base));
657 ASSERT(!(ui8SlaveAddr & 0x80));
658
659 //
660 // Must enable the device before doing anything else.
661 //
662 I2CSlaveEnable(I2C0_BASE);
663
664 //
665 // Set up the slave address.
666 //
667 HWREG(I2C0_BASE + I2C_O_SOAR) = ui8SlaveAddr;
668 }
669
670 //*****************************************************************************
671 //
672 //! \brief Sets the I2C slave address.
673 //!
674 //! This function writes the specified slave address.
675 //!
676 //! \param ui32Base is the base address of the I2C Slave module.
677 //! \param ui8SlaveAddr is the 7-bit slave address
678 //!
679 //! \return None.
680 //
681 //*****************************************************************************
682 __STATIC_INLINE void
I2CSlaveAddressSet(uint32_t ui32Base,uint8_t ui8SlaveAddr)683 I2CSlaveAddressSet(uint32_t ui32Base, uint8_t ui8SlaveAddr)
684 {
685 //
686 // Check the arguments.
687 //
688 ASSERT(I2CBaseValid(ui32Base));
689 ASSERT(!(ui8SlaveAddr & 0x80));
690
691 //
692 // Set up the primary slave address.
693 //
694 HWREG(I2C0_BASE + I2C_O_SOAR) = ui8SlaveAddr;
695 }
696
697 //*****************************************************************************
698 //
699 //! \brief Disables the I2C slave block.
700 //!
701 //! This will disable operation of the I2C slave block.
702 //!
703 //! \param ui32Base is the base address of the I2C Slave module.
704 //!
705 //! \return None
706 //
707 //*****************************************************************************
708 __STATIC_INLINE void
I2CSlaveDisable(uint32_t ui32Base)709 I2CSlaveDisable(uint32_t ui32Base)
710 {
711 // Check the arguments.
712 ASSERT(I2CBaseValid(ui32Base));
713
714 // Disable the slave.
715 HWREG(I2C0_BASE + I2C_O_SCTL) = 0x0;
716
717 // Disable the clock to the slave block.
718 HWREGBITW(I2C0_BASE + I2C_O_MCR, I2C_MCR_SFE_BITN) = 0;
719 }
720
721 //*****************************************************************************
722 //
723 //! \brief Gets the I2C Slave module status.
724 //!
725 //! This function will return the action requested from a master, if any.
726 //!
727 //! \param ui32Base is the base address of the I2C Slave module.
728 //!
729 //! \return Returns the status of the I2C Slave module:
730 //! - \ref I2C_SLAVE_ACT_NONE : No action has been requested of the I2C Slave module.
731 //! - \ref I2C_SLAVE_ACT_RREQ : An I2C master has sent data to the I2C Slave module.
732 //! - \ref I2C_SLAVE_ACT_TREQ : An I2C master has requested that the I2C Slave module send data.
733 //! - \ref I2C_SLAVE_ACT_RREQ_FBR : An I2C master has sent data to the I2C slave
734 //! and the first byte following the slave's own address has been received.
735 //
736 //*****************************************************************************
737 __STATIC_INLINE uint32_t
I2CSlaveStatus(uint32_t ui32Base)738 I2CSlaveStatus(uint32_t ui32Base)
739 {
740 //
741 // Check the arguments.
742 //
743 ASSERT(I2CBaseValid(ui32Base));
744
745 //
746 // Return the slave status.
747 //
748 return(HWREG(I2C0_BASE + I2C_O_SSTAT));
749 }
750
751 //*****************************************************************************
752 //
753 //! \brief Receives a byte that has been sent to the I2C Slave.
754 //!
755 //! This function reads a byte of data from the I2C Slave Data Register.
756 //!
757 //! \param ui32Base is the base address of the I2C Slave module.
758 //!
759 //! \return Returns the byte received from by the I2C Slave, cast as an
760 //! uint32_t.
761 //
762 //*****************************************************************************
763 __STATIC_INLINE uint32_t
I2CSlaveDataGet(uint32_t ui32Base)764 I2CSlaveDataGet(uint32_t ui32Base)
765 {
766 //
767 // Check the arguments.
768 //
769 ASSERT(I2CBaseValid(ui32Base));
770
771 //
772 // Read a byte.
773 //
774 return(HWREG(I2C0_BASE + I2C_O_SDR));
775 }
776
777 //*****************************************************************************
778 //
779 //! \brief Transmits a byte from the I2C Slave.
780 //!
781 //! This function will place the supplied data into I2C Slave Data Register.
782 //!
783 //! \param ui32Base is the base address of the I2C Slave module.
784 //! \param ui8Data data to be transmitted from the I2C Slave.
785 //!
786 //! \return None
787 //
788 //*****************************************************************************
789 __STATIC_INLINE void
I2CSlaveDataPut(uint32_t ui32Base,uint8_t ui8Data)790 I2CSlaveDataPut(uint32_t ui32Base, uint8_t ui8Data)
791 {
792 //
793 // Check the arguments.
794 //
795 ASSERT(I2CBaseValid(ui32Base));
796
797 //
798 // Write the byte.
799 //
800 HWREG(I2C0_BASE + I2C_O_SDR) = ui8Data;
801 }
802
803 //*****************************************************************************
804 //
805 //! \brief Enables individual I2C Slave interrupt sources.
806 //!
807 //! Enables the indicated I2C Slave interrupt sources. Only the sources that
808 //! are enabled can be reflected to the processor interrupt; disabled sources
809 //! have no effect on the processor.
810 //!
811 //! \param ui32Base is the base address of the I2C module.
812 //! \param ui32IntFlags is the bit mask of the slave interrupt sources to be enabled.
813 //! The parameter is the bitwise OR of any of the following:
814 //! - \ref I2C_SLAVE_INT_STOP
815 //! - \ref I2C_SLAVE_INT_START
816 //! - \ref I2C_SLAVE_INT_DATA
817 //!
818 //! \return None
819 //
820 //*****************************************************************************
821 __STATIC_INLINE void
I2CSlaveIntEnable(uint32_t ui32Base,uint32_t ui32IntFlags)822 I2CSlaveIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
823 {
824 uint32_t ui32Val;
825
826 //
827 // Check the arguments.
828 //
829 ASSERT(I2CBaseValid(ui32Base));
830 ASSERT(ui32IntFlags & (I2C_SLAVE_INT_STOP | I2C_SLAVE_INT_START |
831 I2C_SLAVE_INT_DATA));
832
833 //
834 // Enable the slave interrupt.
835 //
836 ui32Val = HWREG(I2C0_BASE + I2C_O_SIMR);
837 ui32Val |= ui32IntFlags;
838 HWREG(I2C0_BASE + I2C_O_SIMR) = ui32Val;
839 }
840
841 //*****************************************************************************
842 //
843 //! \brief Disables individual I2C Slave interrupt sources.
844 //!
845 //! Disables the indicated I2C Slave interrupt sources. Only the sources that
846 //! are enabled can be reflected to the processor interrupt; disabled sources
847 //! have no effect on the processor.
848 //!
849 //! \param ui32Base is the base address of the I2C Slave module.
850 //! \param ui32IntFlags is the bit mask of the interrupt sources to be disabled.
851 //! The parameter is the bitwise OR of any of the following:
852 //! - \ref I2C_SLAVE_INT_STOP
853 //! - \ref I2C_SLAVE_INT_START
854 //! - \ref I2C_SLAVE_INT_DATA
855 //!
856 //! \return None
857 //
858 //*****************************************************************************
859 __STATIC_INLINE void
I2CSlaveIntDisable(uint32_t ui32Base,uint32_t ui32IntFlags)860 I2CSlaveIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
861 {
862 uint32_t ui32Val;
863
864 //
865 // Check the arguments.
866 //
867 ASSERT(I2CBaseValid(ui32Base));
868 ASSERT(ui32IntFlags & (I2C_SLAVE_INT_STOP | I2C_SLAVE_INT_START |
869 I2C_SLAVE_INT_DATA));
870
871 //
872 // Disable the slave interrupt.
873 //
874 ui32Val = HWREG(I2C0_BASE + I2C_O_SIMR);
875 ui32Val &= ~ui32IntFlags;
876 HWREG(I2C0_BASE + I2C_O_SIMR) = ui32Val;
877 }
878
879 //*****************************************************************************
880 //
881 //! \brief Clears I2C Slave interrupt sources.
882 //!
883 //! The specified I2C Slave interrupt sources are cleared, so that they no
884 //! longer assert. This must be done in the interrupt handler to keep it from
885 //! being called again immediately upon exit.
886 //!
887 //! \note Due to write buffers and synchronizers in the system it may take several
888 //! clock cycles from a register write clearing an event in a module and until the
889 //! event is actually cleared in the NVIC of the system CPU. It is recommended to
890 //! clear the event source early in the interrupt service routine (ISR) to allow
891 //! the event clear to propagate to the NVIC before returning from the ISR.
892 //! At the same time, an early event clear allows new events of the same type to be
893 //! pended instead of ignored if the event is cleared later in the ISR.
894 //! It is the responsibility of the programmer to make sure that enough time has passed
895 //! before returning from the ISR to avoid false re-triggering of the cleared event.
896 //! A simple, although not necessarily optimal, way of clearing an event before
897 //! returning from the ISR is:
898 //! -# Write to clear event (interrupt source). (buffered write)
899 //! -# Dummy read from the event source module. (making sure the write has propagated)
900 //! -# Wait two system CPU clock cycles (user code or two NOPs). (allowing cleared event to propagate through any synchronizers)
901 //!
902 //! \param ui32Base is the base address of the I2C module.
903 //! \param ui32IntFlags is a bit mask of the interrupt sources to be cleared.
904 //! The parameter is the bitwise OR of any of the following:
905 //! - \ref I2C_SLAVE_INT_STOP
906 //! - \ref I2C_SLAVE_INT_START
907 //! - \ref I2C_SLAVE_INT_DATA
908 //!
909 //! \return None
910 //
911 //*****************************************************************************
912 __STATIC_INLINE void
I2CSlaveIntClear(uint32_t ui32Base,uint32_t ui32IntFlags)913 I2CSlaveIntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
914 {
915 //
916 // Check the arguments.
917 //
918 ASSERT(I2CBaseValid(ui32Base));
919
920 //
921 // Clear the I2C slave interrupt source.
922 //
923 HWREG(I2C0_BASE + I2C_O_SICR) = ui32IntFlags;
924 }
925
926 //*****************************************************************************
927 //
928 //! \brief Gets the current I2C Slave interrupt status.
929 //!
930 //! This returns the interrupt status for the I2C Slave module. Either the raw
931 //! interrupt status or the status of interrupts that are allowed to reflect to
932 //! the processor can be returned.
933 //!
934 //! \param ui32Base is the base address of the I2C Slave module.
935 //! \param bMasked selects either raw or masked interrupt status.
936 //! - \c false : Raw interrupt status is requested.
937 //! - \c true : Masked interrupt status is requested.
938 //!
939 //! \return Returns the current interrupt status as an OR'ed combination of:
940 //! - \ref I2C_SLAVE_INT_STOP
941 //! - \ref I2C_SLAVE_INT_START
942 //! - \ref I2C_SLAVE_INT_DATA
943
944 //
945 //*****************************************************************************
946 __STATIC_INLINE uint32_t
I2CSlaveIntStatus(uint32_t ui32Base,bool bMasked)947 I2CSlaveIntStatus(uint32_t ui32Base, bool bMasked)
948 {
949 //
950 // Check the arguments.
951 //
952 ASSERT(I2CBaseValid(ui32Base));
953
954 //
955 // Return either the interrupt status or the raw interrupt status as
956 // requested.
957 //
958 if(bMasked)
959 {
960 return(HWREG(I2C0_BASE + I2C_O_SMIS));
961 }
962 else
963 {
964 return(HWREG(I2C0_BASE + I2C_O_SRIS));
965 }
966 }
967
968 //*****************************************************************************
969 //
970 //! \brief Registers an interrupt handler for the I2C module.
971 //!
972 //! This sets the handler to be called when an I2C interrupt occurs. This will
973 //! enable the global interrupt in the interrupt controller; specific I2C
974 //! interrupts must be enabled via \ref I2CMasterIntEnable() and
975 //! \ref I2CSlaveIntEnable(). If necessary, it is the interrupt handler's
976 //! responsibility to clear the interrupt source via \ref I2CMasterIntClear() and
977 //! \ref I2CSlaveIntClear().
978 //!
979 //! \param ui32Base is the base address of the I2C Master module.
980 //! \param pfnHandler is a pointer to the function to be called when the
981 //! I2C interrupt occurs.
982 //!
983 //! \return None
984 //!
985 //! \sa \ref IntRegister() for important information about registering interrupt
986 //! handlers.
987 //
988 //*****************************************************************************
989 extern void I2CIntRegister(uint32_t ui32Base, void (*pfnHandler)(void));
990
991 //*****************************************************************************
992 //
993 //! \brief Unregisters an interrupt handler for the I2C module.
994 //!
995 //! This function will clear the handler to be called when an I2C interrupt
996 //! occurs. This will also mask off the interrupt in the interrupt controller
997 //! so that the interrupt handler no longer is called.
998 //!
999 //! \param ui32Base is the base address of the I2C Master module.
1000 //!
1001 //! \return None
1002 //!
1003 //! \sa \brief IntRegister() for important information about registering interrupt
1004 //! handlers.
1005 //
1006 //*****************************************************************************
1007 extern void I2CIntUnregister(uint32_t ui32Base);
1008
1009 //*****************************************************************************
1010 //
1011 // Support for DriverLib in ROM:
1012 // Redirect to implementation in ROM when available.
1013 //
1014 //*****************************************************************************
1015 #if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
1016 #include <driverlib/rom.h>
1017 #ifdef ROM_I2CMasterInitExpClk
1018 #undef I2CMasterInitExpClk
1019 #define I2CMasterInitExpClk ROM_I2CMasterInitExpClk
1020 #endif
1021 #ifdef ROM_I2CMasterErr
1022 #undef I2CMasterErr
1023 #define I2CMasterErr ROM_I2CMasterErr
1024 #endif
1025 #ifdef ROM_I2CIntRegister
1026 #undef I2CIntRegister
1027 #define I2CIntRegister ROM_I2CIntRegister
1028 #endif
1029 #ifdef ROM_I2CIntUnregister
1030 #undef I2CIntUnregister
1031 #define I2CIntUnregister ROM_I2CIntUnregister
1032 #endif
1033 #endif
1034
1035 //*****************************************************************************
1036 //
1037 // Mark the end of the C bindings section for C++ compilers.
1038 //
1039 //*****************************************************************************
1040 #ifdef __cplusplus
1041 }
1042 #endif
1043
1044 #endif // __I2C_H__
1045
1046 //*****************************************************************************
1047 //
1048 //! Close the Doxygen group.
1049 //! @}
1050 //! @}
1051 //
1052 //*****************************************************************************
1053