Searched defs:MASK (Results 1 – 16 of 16) sorted by relevance
49 …__IO uint32_t MASK; /*!< Mask register. This register holds the 32-bit mask value. A 1 written t… member
51 __IO uint32_t MASK[32]; /*!< Offset 0x2080: Mask register port n */ member
743 #define IS_RTC_ALARM_MASK(MASK) (((MASK) & 0x7F7F7F7FU) == (uint32_t)RESET) argument747 #define IS_RTC_ALARM_SUB_SECOND_MASK(MASK) (((MASK) == RTC_ALARMSUBSECONDMASK_ALL) || \ argument
631 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ argument
511 #define IS_SMBUS_OWN_ADDRESS2_MASK(MASK) (((MASK) == SMBUS_OA2_NOMASK) || \ argument
272 #define IS_ALARM_MASK(MASK) (((MASK) & 0x7F7F7F7F) == (uint32_t)RESET) argument326 #define IS_RTC_ALARM_SUB_SECOND_MASK(MASK) (((MASK) == RTC_AlarmSubSecondMask_All) || \ argument
211 #define IS_FMPI2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == FMPI2C_OA2_NoMask) || \ argument
527 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ argument
153 #define IS_ETH_MAC_ADDRESS_MASK(MASK) (((MASK) == ETH_MAC_ADDRESSMASK_BYTE6) || \ argument
279 #define IS_ALARM_MASK(MASK) (((MASK) & 0x7F7F7F7F) == (uint32_t)RESET) argument
840 __IO uint32_t MASK; /*!< SDIO mask register, Address offset: 0x3C */ member
1136 __IO uint32_t MASK; member
795 __IO uint32_t MASK; /*!< SDMMC mask register, Address offset: 0x3C */ member
844 __IO uint32_t MASK; /*!< SDMMC mask register, Address offset: 0x3C */ member
845 __IO uint32_t MASK; /*!< SDMMC mask register, Address offset: 0x3C */ member
1757 __IO uint32_t MASK; /*!< SDIO mask register, Address offset: 0x3C */ member
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