1 /*
2 * Copyright (c) 2015 - 2020, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this
9 * list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #ifndef NRF_SAADC_H_
33 #define NRF_SAADC_H_
34
35 #include <nrfx.h>
36
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40
41 /**
42 * @defgroup nrf_saadc_hal SAADC HAL
43 * @{
44 * @ingroup nrf_saadc
45 * @brief Hardware access layer for managing the SAADC peripheral.
46 */
47
48 /** @brief Resolution of the analog-to-digital converter. */
49 typedef enum
50 {
51 NRF_SAADC_RESOLUTION_8BIT = SAADC_RESOLUTION_VAL_8bit, ///< 8 bit resolution.
52 NRF_SAADC_RESOLUTION_10BIT = SAADC_RESOLUTION_VAL_10bit, ///< 10 bit resolution.
53 NRF_SAADC_RESOLUTION_12BIT = SAADC_RESOLUTION_VAL_12bit, ///< 12 bit resolution.
54 NRF_SAADC_RESOLUTION_14BIT = SAADC_RESOLUTION_VAL_14bit ///< 14 bit resolution.
55 } nrf_saadc_resolution_t;
56
57 /** @brief Input selection for the analog-to-digital converter. */
58 typedef enum
59 {
60 NRF_SAADC_INPUT_DISABLED = SAADC_CH_PSELP_PSELP_NC, ///< Not connected.
61 NRF_SAADC_INPUT_AIN0 = SAADC_CH_PSELP_PSELP_AnalogInput0, ///< Analog input 0 (AIN0).
62 NRF_SAADC_INPUT_AIN1 = SAADC_CH_PSELP_PSELP_AnalogInput1, ///< Analog input 1 (AIN1).
63 NRF_SAADC_INPUT_AIN2 = SAADC_CH_PSELP_PSELP_AnalogInput2, ///< Analog input 2 (AIN2).
64 NRF_SAADC_INPUT_AIN3 = SAADC_CH_PSELP_PSELP_AnalogInput3, ///< Analog input 3 (AIN3).
65 NRF_SAADC_INPUT_AIN4 = SAADC_CH_PSELP_PSELP_AnalogInput4, ///< Analog input 4 (AIN4).
66 NRF_SAADC_INPUT_AIN5 = SAADC_CH_PSELP_PSELP_AnalogInput5, ///< Analog input 5 (AIN5).
67 NRF_SAADC_INPUT_AIN6 = SAADC_CH_PSELP_PSELP_AnalogInput6, ///< Analog input 6 (AIN6).
68 NRF_SAADC_INPUT_AIN7 = SAADC_CH_PSELP_PSELP_AnalogInput7, ///< Analog input 7 (AIN7).
69 NRF_SAADC_INPUT_VDD = SAADC_CH_PSELP_PSELP_VDD, ///< VDD as input.
70 #if defined(SAADC_CH_PSELP_PSELP_VDDHDIV5) || defined(__NRFX_DOXYGEN__)
71 NRF_SAADC_INPUT_VDDHDIV5 = SAADC_CH_PSELP_PSELP_VDDHDIV5 ///< VDDH/5 as input.
72 #endif
73 } nrf_saadc_input_t;
74
75 /** @brief Analog-to-digital converter oversampling mode. */
76 typedef enum
77 {
78 NRF_SAADC_OVERSAMPLE_DISABLED = SAADC_OVERSAMPLE_OVERSAMPLE_Bypass, ///< No oversampling.
79 NRF_SAADC_OVERSAMPLE_2X = SAADC_OVERSAMPLE_OVERSAMPLE_Over2x, ///< Oversample 2x.
80 NRF_SAADC_OVERSAMPLE_4X = SAADC_OVERSAMPLE_OVERSAMPLE_Over4x, ///< Oversample 4x.
81 NRF_SAADC_OVERSAMPLE_8X = SAADC_OVERSAMPLE_OVERSAMPLE_Over8x, ///< Oversample 8x.
82 NRF_SAADC_OVERSAMPLE_16X = SAADC_OVERSAMPLE_OVERSAMPLE_Over16x, ///< Oversample 16x.
83 NRF_SAADC_OVERSAMPLE_32X = SAADC_OVERSAMPLE_OVERSAMPLE_Over32x, ///< Oversample 32x.
84 NRF_SAADC_OVERSAMPLE_64X = SAADC_OVERSAMPLE_OVERSAMPLE_Over64x, ///< Oversample 64x.
85 NRF_SAADC_OVERSAMPLE_128X = SAADC_OVERSAMPLE_OVERSAMPLE_Over128x, ///< Oversample 128x.
86 NRF_SAADC_OVERSAMPLE_256X = SAADC_OVERSAMPLE_OVERSAMPLE_Over256x ///< Oversample 256x.
87 } nrf_saadc_oversample_t;
88
89 /** @brief Analog-to-digital converter channel resistor control. */
90 typedef enum
91 {
92 NRF_SAADC_RESISTOR_DISABLED = SAADC_CH_CONFIG_RESP_Bypass, ///< Bypass resistor ladder.
93 NRF_SAADC_RESISTOR_PULLDOWN = SAADC_CH_CONFIG_RESP_Pulldown, ///< Pull-down to GND.
94 NRF_SAADC_RESISTOR_PULLUP = SAADC_CH_CONFIG_RESP_Pullup, ///< Pull-up to VDD.
95 NRF_SAADC_RESISTOR_VDD1_2 = SAADC_CH_CONFIG_RESP_VDD1_2 ///< Set input at VDD/2.
96 } nrf_saadc_resistor_t;
97
98 /** @brief Gain factor of the analog-to-digital converter input. */
99 typedef enum
100 {
101 NRF_SAADC_GAIN1_6 = SAADC_CH_CONFIG_GAIN_Gain1_6, ///< Gain factor 1/6.
102 NRF_SAADC_GAIN1_5 = SAADC_CH_CONFIG_GAIN_Gain1_5, ///< Gain factor 1/5.
103 NRF_SAADC_GAIN1_4 = SAADC_CH_CONFIG_GAIN_Gain1_4, ///< Gain factor 1/4.
104 NRF_SAADC_GAIN1_3 = SAADC_CH_CONFIG_GAIN_Gain1_3, ///< Gain factor 1/3.
105 NRF_SAADC_GAIN1_2 = SAADC_CH_CONFIG_GAIN_Gain1_2, ///< Gain factor 1/2.
106 NRF_SAADC_GAIN1 = SAADC_CH_CONFIG_GAIN_Gain1, ///< Gain factor 1.
107 NRF_SAADC_GAIN2 = SAADC_CH_CONFIG_GAIN_Gain2, ///< Gain factor 2.
108 NRF_SAADC_GAIN4 = SAADC_CH_CONFIG_GAIN_Gain4, ///< Gain factor 4.
109 } nrf_saadc_gain_t;
110
111 /** @brief Reference selection for the analog-to-digital converter. */
112 typedef enum
113 {
114 NRF_SAADC_REFERENCE_INTERNAL = SAADC_CH_CONFIG_REFSEL_Internal, ///< Internal reference (0.6 V).
115 NRF_SAADC_REFERENCE_VDD4 = SAADC_CH_CONFIG_REFSEL_VDD1_4 ///< VDD/4 as reference.
116 } nrf_saadc_reference_t;
117
118 /** @brief Analog-to-digital converter acquisition time. */
119 typedef enum
120 {
121 NRF_SAADC_ACQTIME_3US = SAADC_CH_CONFIG_TACQ_3us, ///< 3 us.
122 NRF_SAADC_ACQTIME_5US = SAADC_CH_CONFIG_TACQ_5us, ///< 5 us.
123 NRF_SAADC_ACQTIME_10US = SAADC_CH_CONFIG_TACQ_10us, ///< 10 us.
124 NRF_SAADC_ACQTIME_15US = SAADC_CH_CONFIG_TACQ_15us, ///< 15 us.
125 NRF_SAADC_ACQTIME_20US = SAADC_CH_CONFIG_TACQ_20us, ///< 20 us.
126 NRF_SAADC_ACQTIME_40US = SAADC_CH_CONFIG_TACQ_40us ///< 40 us.
127 } nrf_saadc_acqtime_t;
128
129 /** @brief Analog-to-digital converter channel mode. */
130 typedef enum
131 {
132 NRF_SAADC_MODE_SINGLE_ENDED = SAADC_CH_CONFIG_MODE_SE, ///< Single-ended mode. PSELN will be ignored, negative input to ADC shorted to GND.
133 NRF_SAADC_MODE_DIFFERENTIAL = SAADC_CH_CONFIG_MODE_Diff ///< Differential mode.
134 } nrf_saadc_mode_t;
135
136 /** @brief Analog-to-digital converter channel burst mode. */
137 typedef enum
138 {
139 NRF_SAADC_BURST_DISABLED = SAADC_CH_CONFIG_BURST_Disabled, ///< Burst mode is disabled (normal operation).
140 NRF_SAADC_BURST_ENABLED = SAADC_CH_CONFIG_BURST_Enabled ///< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM.
141 } nrf_saadc_burst_t;
142
143 /** @brief Analog-to-digital converter tasks. */
144 typedef enum
145 {
146 NRF_SAADC_TASK_START = offsetof(NRF_SAADC_Type, TASKS_START), ///< Start the ADC and prepare the result buffer in RAM.
147 NRF_SAADC_TASK_SAMPLE = offsetof(NRF_SAADC_Type, TASKS_SAMPLE), ///< Take one ADC sample. If scan is enabled, all channels are sampled.
148 NRF_SAADC_TASK_STOP = offsetof(NRF_SAADC_Type, TASKS_STOP), ///< Stop the ADC and terminate any ongoing conversion.
149 NRF_SAADC_TASK_CALIBRATEOFFSET = offsetof(NRF_SAADC_Type, TASKS_CALIBRATEOFFSET), ///< Starts offset auto-calibration.
150 } nrf_saadc_task_t;
151
152 /** @brief Analog-to-digital converter events. */
153 typedef enum
154 {
155 NRF_SAADC_EVENT_STARTED = offsetof(NRF_SAADC_Type, EVENTS_STARTED), ///< The ADC has started.
156 NRF_SAADC_EVENT_END = offsetof(NRF_SAADC_Type, EVENTS_END), ///< The ADC has filled up the result buffer.
157 NRF_SAADC_EVENT_DONE = offsetof(NRF_SAADC_Type, EVENTS_DONE), ///< A conversion task has been completed.
158 NRF_SAADC_EVENT_RESULTDONE = offsetof(NRF_SAADC_Type, EVENTS_RESULTDONE), ///< A result is ready to get transferred to RAM.
159 NRF_SAADC_EVENT_CALIBRATEDONE = offsetof(NRF_SAADC_Type, EVENTS_CALIBRATEDONE), ///< Calibration is complete.
160 NRF_SAADC_EVENT_STOPPED = offsetof(NRF_SAADC_Type, EVENTS_STOPPED), ///< The ADC has stopped.
161 NRF_SAADC_EVENT_CH0_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[0].LIMITH), ///< Last result is equal or above CH[0].LIMIT.HIGH.
162 NRF_SAADC_EVENT_CH0_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[0].LIMITL), ///< Last result is equal or below CH[0].LIMIT.LOW.
163 NRF_SAADC_EVENT_CH1_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[1].LIMITH), ///< Last result is equal or above CH[1].LIMIT.HIGH.
164 NRF_SAADC_EVENT_CH1_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[1].LIMITL), ///< Last result is equal or below CH[1].LIMIT.LOW.
165 NRF_SAADC_EVENT_CH2_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[2].LIMITH), ///< Last result is equal or above CH[2].LIMIT.HIGH.
166 NRF_SAADC_EVENT_CH2_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[2].LIMITL), ///< Last result is equal or below CH[2].LIMIT.LOW.
167 NRF_SAADC_EVENT_CH3_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITH), ///< Last result is equal or above CH[3].LIMIT.HIGH.
168 NRF_SAADC_EVENT_CH3_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITL), ///< Last result is equal or below CH[3].LIMIT.LOW.
169 NRF_SAADC_EVENT_CH4_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITH), ///< Last result is equal or above CH[4].LIMIT.HIGH.
170 NRF_SAADC_EVENT_CH4_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITL), ///< Last result is equal or below CH[4].LIMIT.LOW.
171 NRF_SAADC_EVENT_CH5_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[5].LIMITH), ///< Last result is equal or above CH[5].LIMIT.HIGH.
172 NRF_SAADC_EVENT_CH5_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[5].LIMITL), ///< Last result is equal or below CH[5].LIMIT.LOW.
173 NRF_SAADC_EVENT_CH6_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[6].LIMITH), ///< Last result is equal or above CH[6].LIMIT.HIGH.
174 NRF_SAADC_EVENT_CH6_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[6].LIMITL), ///< Last result is equal or below CH[6].LIMIT.LOW.
175 NRF_SAADC_EVENT_CH7_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITH), ///< Last result is equal or above CH[7].LIMIT.HIGH.
176 NRF_SAADC_EVENT_CH7_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITL) ///< Last result is equal or below CH[7].LIMIT.LOW.
177 } nrf_saadc_event_t;
178
179 /** @brief Analog-to-digital converter interrupt masks. */
180 typedef enum
181 {
182 NRF_SAADC_INT_STARTED = SAADC_INTENSET_STARTED_Msk, ///< Interrupt on EVENTS_STARTED event.
183 NRF_SAADC_INT_END = SAADC_INTENSET_END_Msk, ///< Interrupt on EVENTS_END event.
184 NRF_SAADC_INT_DONE = SAADC_INTENSET_DONE_Msk, ///< Interrupt on EVENTS_DONE event.
185 NRF_SAADC_INT_RESULTDONE = SAADC_INTENSET_RESULTDONE_Msk, ///< Interrupt on EVENTS_RESULTDONE event.
186 NRF_SAADC_INT_CALIBRATEDONE = SAADC_INTENSET_CALIBRATEDONE_Msk, ///< Interrupt on EVENTS_CALIBRATEDONE event.
187 NRF_SAADC_INT_STOPPED = SAADC_INTENSET_STOPPED_Msk, ///< Interrupt on EVENTS_STOPPED event.
188 NRF_SAADC_INT_CH0LIMITH = SAADC_INTENSET_CH0LIMITH_Msk, ///< Interrupt on EVENTS_CH[0].LIMITH event.
189 NRF_SAADC_INT_CH0LIMITL = SAADC_INTENSET_CH0LIMITL_Msk, ///< Interrupt on EVENTS_CH[0].LIMITL event.
190 NRF_SAADC_INT_CH1LIMITH = SAADC_INTENSET_CH1LIMITH_Msk, ///< Interrupt on EVENTS_CH[1].LIMITH event.
191 NRF_SAADC_INT_CH1LIMITL = SAADC_INTENSET_CH1LIMITL_Msk, ///< Interrupt on EVENTS_CH[1].LIMITL event.
192 NRF_SAADC_INT_CH2LIMITH = SAADC_INTENSET_CH2LIMITH_Msk, ///< Interrupt on EVENTS_CH[2].LIMITH event.
193 NRF_SAADC_INT_CH2LIMITL = SAADC_INTENSET_CH2LIMITL_Msk, ///< Interrupt on EVENTS_CH[2].LIMITL event.
194 NRF_SAADC_INT_CH3LIMITH = SAADC_INTENSET_CH3LIMITH_Msk, ///< Interrupt on EVENTS_CH[3].LIMITH event.
195 NRF_SAADC_INT_CH3LIMITL = SAADC_INTENSET_CH3LIMITL_Msk, ///< Interrupt on EVENTS_CH[3].LIMITL event.
196 NRF_SAADC_INT_CH4LIMITH = SAADC_INTENSET_CH4LIMITH_Msk, ///< Interrupt on EVENTS_CH[4].LIMITH event.
197 NRF_SAADC_INT_CH4LIMITL = SAADC_INTENSET_CH4LIMITL_Msk, ///< Interrupt on EVENTS_CH[4].LIMITL event.
198 NRF_SAADC_INT_CH5LIMITH = SAADC_INTENSET_CH5LIMITH_Msk, ///< Interrupt on EVENTS_CH[5].LIMITH event.
199 NRF_SAADC_INT_CH5LIMITL = SAADC_INTENSET_CH5LIMITL_Msk, ///< Interrupt on EVENTS_CH[5].LIMITL event.
200 NRF_SAADC_INT_CH6LIMITH = SAADC_INTENSET_CH6LIMITH_Msk, ///< Interrupt on EVENTS_CH[6].LIMITH event.
201 NRF_SAADC_INT_CH6LIMITL = SAADC_INTENSET_CH6LIMITL_Msk, ///< Interrupt on EVENTS_CH[6].LIMITL event.
202 NRF_SAADC_INT_CH7LIMITH = SAADC_INTENSET_CH7LIMITH_Msk, ///< Interrupt on EVENTS_CH[7].LIMITH event.
203 NRF_SAADC_INT_CH7LIMITL = SAADC_INTENSET_CH7LIMITL_Msk, ///< Interrupt on EVENTS_CH[7].LIMITL event.
204 NRF_SAADC_INT_ALL = 0x7FFFFFFFUL ///< Mask of all interrupts.
205 } nrf_saadc_int_mask_t;
206
207 /** @brief Analog-to-digital converter value limit type. */
208 typedef enum
209 {
210 NRF_SAADC_LIMIT_LOW = 0, ///< Low limit type.
211 NRF_SAADC_LIMIT_HIGH = 1 ///< High limit type.
212 } nrf_saadc_limit_t;
213
214 /** @brief Type of a single ADC conversion result. */
215 typedef int16_t nrf_saadc_value_t;
216
217 /** @brief Analog-to-digital converter configuration structure. */
218 typedef struct
219 {
220 nrf_saadc_resolution_t resolution; ///< Resolution of samples.
221 nrf_saadc_oversample_t oversample; ///< Oversampling configuration.
222 nrf_saadc_value_t * buffer; ///< Pointer to sample buffer.
223 uint32_t buffer_size; ///< Size of the sample buffer.
224 } nrf_saadc_config_t;
225
226 /** @brief Analog-to-digital converter channel configuration structure. */
227 typedef struct
228 {
229 nrf_saadc_resistor_t resistor_p; ///< Resistor value on positive input.
230 nrf_saadc_resistor_t resistor_n; ///< Resistor value on negative input.
231 nrf_saadc_gain_t gain; ///< Gain control value.
232 nrf_saadc_reference_t reference; ///< Reference control value.
233 nrf_saadc_acqtime_t acq_time; ///< Acquisition time.
234 nrf_saadc_mode_t mode; ///< SAADC mode. Single-ended or differential.
235 nrf_saadc_burst_t burst; ///< Burst mode configuration.
236 } nrf_saadc_channel_config_t;
237
238
239 /**
240 * @brief Function for triggering the specified SAADC task.
241 *
242 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
243 * @param[in] task SAADC task.
244 */
245 NRF_STATIC_INLINE void nrf_saadc_task_trigger(NRF_SAADC_Type * p_reg,
246 nrf_saadc_task_t task);
247
248 /**
249 * @brief Function for getting the address of the specified SAADC task register.
250 *
251 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
252 * @param[in] task SAADC task.
253 *
254 * @return Address of the specified SAADC task.
255 */
256 NRF_STATIC_INLINE uint32_t nrf_saadc_task_address_get(NRF_SAADC_Type const * p_reg,
257 nrf_saadc_task_t task);
258
259 /**
260 * @brief Function for retrieving the state of the SAADC event.
261 *
262 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
263 * @param[in] event Event to be checked.
264 *
265 * @retval true The event has been generated.
266 * @retval false The event has not been generated.
267 */
268 NRF_STATIC_INLINE bool nrf_saadc_event_check(NRF_SAADC_Type const * p_reg,
269 nrf_saadc_event_t event);
270
271 /**
272 * @brief Function for clearing the specific SAADC event.
273 *
274 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
275 * @param[in] event SAADC event.
276 */
277 NRF_STATIC_INLINE void nrf_saadc_event_clear(NRF_SAADC_Type * p_reg,
278 nrf_saadc_event_t event);
279
280 /**
281 * @brief Function for getting the address of the specified SAADC event register.
282 *
283 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
284 * @param[in] event SAADC event.
285 *
286 * @return Address of the specified SAADC event.
287 */
288 NRF_STATIC_INLINE uint32_t nrf_saadc_event_address_get(NRF_SAADC_Type const * p_reg,
289 nrf_saadc_event_t event);
290
291 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
292 /**
293 * @brief Function for setting the subscribe configuration for a given
294 * SAADC task.
295 *
296 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
297 * @param[in] task Task for which to set the configuration.
298 * @param[in] channel Channel through which to subscribe events.
299 */
300 NRF_STATIC_INLINE void nrf_saadc_subscribe_set(NRF_SAADC_Type * p_reg,
301 nrf_saadc_task_t task,
302 uint8_t channel);
303
304 /**
305 * @brief Function for clearing the subscribe configuration for a given
306 * SAADC task.
307 *
308 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
309 * @param[in] task Task for which to clear the configuration.
310 */
311 NRF_STATIC_INLINE void nrf_saadc_subscribe_clear(NRF_SAADC_Type * p_reg,
312 nrf_saadc_task_t task);
313
314 /**
315 * @brief Function for setting the publish configuration for a given
316 * SAADC event.
317 *
318 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
319 * @param[in] event Event for which to set the configuration.
320 * @param[in] channel Channel through which to publish the event.
321 */
322 NRF_STATIC_INLINE void nrf_saadc_publish_set(NRF_SAADC_Type * p_reg,
323 nrf_saadc_event_t event,
324 uint8_t channel);
325
326 /**
327 * @brief Function for clearing the publish configuration for a given
328 * SAADC event.
329 *
330 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
331 * @param[in] event Event for which to clear the configuration.
332 */
333 NRF_STATIC_INLINE void nrf_saadc_publish_clear(NRF_SAADC_Type * p_reg,
334 nrf_saadc_event_t event);
335 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
336
337 /**
338 * @brief Function for getting the SAADC channel monitoring limit events.
339 *
340 * @param[in] channel Channel number.
341 * @param[in] limit_type Low limit or high limit.
342 *
343 * @return The SAADC channel monitoring limit event.
344 */
345 NRF_STATIC_INLINE nrf_saadc_event_t nrf_saadc_limit_event_get(uint8_t channel,
346 nrf_saadc_limit_t limit_type);
347
348 /**
349 * @brief Function for configuring the input pins for the specified SAADC channel.
350 *
351 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
352 * @param[in] channel Channel number.
353 * @param[in] pselp Positive input.
354 * @param[in] pseln Negative input. Set to NRF_SAADC_INPUT_DISABLED in single ended mode.
355 */
356 NRF_STATIC_INLINE void nrf_saadc_channel_input_set(NRF_SAADC_Type * p_reg,
357 uint8_t channel,
358 nrf_saadc_input_t pselp,
359 nrf_saadc_input_t pseln);
360
361 /**
362 * @brief Function for configuring the positive input pin for the specified SAADC channel.
363 *
364 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
365 * @param[in] channel Channel number.
366 * @param[in] pselp Positive input.
367 */
368 NRF_STATIC_INLINE void nrf_saadc_channel_pos_input_set(NRF_SAADC_Type * p_reg,
369 uint8_t channel,
370 nrf_saadc_input_t pselp);
371
372 /**
373 * @brief Function for setting the SAADC channel monitoring limits.
374 *
375 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
376 * @param[in] channel Channel number.
377 * @param[in] low Low limit.
378 * @param[in] high High limit.
379 */
380 NRF_STATIC_INLINE void nrf_saadc_channel_limits_set(NRF_SAADC_Type * p_reg,
381 uint8_t channel,
382 int16_t low,
383 int16_t high);
384
385 /**
386 * @brief Function for setting the configuration of SAADC interrupts.
387 *
388 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
389 * @param[in] mask Interrupts configuration to be set.
390 */
391 NRF_STATIC_INLINE void nrf_saadc_int_set(NRF_SAADC_Type * p_reg, uint32_t mask);
392
393 /**
394 * @brief Function for enabling specified SAADC interrupts.
395 *
396 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
397 * @param[in] mask Mask of interrupts to be enabled.
398 */
399 NRF_STATIC_INLINE void nrf_saadc_int_enable(NRF_SAADC_Type * p_reg, uint32_t mask);
400
401 /**
402 * @brief Function for checking if the specified interrupts are enabled.
403 *
404 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
405 * @param[in] mask Mask of interrupts to be checked.
406 *
407 * @return Mask of enabled interrupts.
408 */
409 NRF_STATIC_INLINE uint32_t nrf_saadc_int_enable_check(NRF_SAADC_Type const * p_reg, uint32_t mask);
410
411 /**
412 * @brief Function for disabling specified interrupts.
413 *
414 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
415 * @param[in] mask Mask of interrupts to be disabled.
416 */
417 NRF_STATIC_INLINE void nrf_saadc_int_disable(NRF_SAADC_Type * p_reg, uint32_t mask);
418
419 /**
420 * @brief Function for generating masks for SAADC channel limit interrupts.
421 *
422 * @param[in] channel SAADC channel number.
423 * @param[in] limit_type Limit type.
424 *
425 * @return Interrupt mask.
426 */
427 NRF_STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel,
428 nrf_saadc_limit_t limit_type);
429
430 /**
431 * @brief Function for checking whether the SAADC is busy.
432 *
433 * This function checks whether the analog-to-digital converter is busy with a conversion.
434 *
435 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
436 *
437 * @retval true The SAADC is busy.
438 * @retval false The SAADC is not busy.
439 */
440 NRF_STATIC_INLINE bool nrf_saadc_busy_check(NRF_SAADC_Type const * p_reg);
441
442 /**
443 * @brief Function for enabling the SAADC.
444 *
445 * The analog-to-digital converter must be enabled before use.
446 *
447 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
448 */
449 NRF_STATIC_INLINE void nrf_saadc_enable(NRF_SAADC_Type * p_reg);
450
451 /**
452 * @brief Function for disabling the SAADC.
453 *
454 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
455 */
456 NRF_STATIC_INLINE void nrf_saadc_disable(NRF_SAADC_Type * p_reg);
457
458 /**
459 * @brief Function for checking if the SAADC is enabled.
460 *
461 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
462 *
463 * @retval true The SAADC is enabled.
464 * @retval false The SAADC is not enabled.
465 */
466 NRF_STATIC_INLINE bool nrf_saadc_enable_check(NRF_SAADC_Type const * p_reg);
467
468 /**
469 * @brief Function for initializing the SAADC result buffer.
470 *
471 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
472 * @param[in] p_buffer Pointer to the result buffer.
473 * @param[in] size Size of the buffer (in 16-bit samples).
474 */
475 NRF_STATIC_INLINE void nrf_saadc_buffer_init(NRF_SAADC_Type * p_reg,
476 nrf_saadc_value_t * p_buffer,
477 uint32_t size);
478
479 /**
480 * @brief Function for setting the SAADC result buffer pointer.
481 *
482 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
483 * @param[in] p_buffer Pointer to the result buffer.
484 */
485 NRF_STATIC_INLINE void nrf_saadc_buffer_pointer_set(NRF_SAADC_Type * p_reg,
486 nrf_saadc_value_t * p_buffer);
487
488 /**
489 * @brief Function for getting the SAADC result buffer pointer.
490 *
491 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
492 *
493 * @return Pointer to the result buffer.
494 */
495 NRF_STATIC_INLINE nrf_saadc_value_t * nrf_saadc_buffer_pointer_get(NRF_SAADC_Type const * p_reg);
496
497 /**
498 * @brief Function for getting the number of samples written to the result
499 * buffer since the previous START task.
500 *
501 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
502 *
503 * @return Number of 16-bit samples written to the buffer.
504 */
505 NRF_STATIC_INLINE uint16_t nrf_saadc_amount_get(NRF_SAADC_Type const * p_reg);
506
507 /**
508 * @brief Function for setting the SAADC sample resolution.
509 *
510 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
511 * @param[in] resolution Bit resolution.
512 */
513 NRF_STATIC_INLINE void nrf_saadc_resolution_set(NRF_SAADC_Type * p_reg,
514 nrf_saadc_resolution_t resolution);
515
516 /**
517 * @brief Function for getting the SAADC sample resolution.
518 *
519 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
520 *
521 * @return Sample resolution.
522 */
523 NRF_STATIC_INLINE nrf_saadc_resolution_t nrf_saadc_resolution_get(NRF_SAADC_Type const * p_reg);
524
525 /**
526 * @brief Function for configuring the oversampling feature.
527 *
528 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
529 * @param[in] oversample Oversampling mode.
530 */
531 NRF_STATIC_INLINE void nrf_saadc_oversample_set(NRF_SAADC_Type * p_reg,
532 nrf_saadc_oversample_t oversample);
533
534 /**
535 * @brief Function for getting the oversampling feature configuration.
536 *
537 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
538 *
539 * @return Oversampling configuration.
540 */
541 NRF_STATIC_INLINE nrf_saadc_oversample_t nrf_saadc_oversample_get(NRF_SAADC_Type const * p_reg);
542
543 /**
544 * @brief Function for getting the sample count needed for one averaged result for a given
545 * oversampling configuration.
546 *
547 * @param[in] oversample Oversampling configuration.
548 *
549 * @return Sample count.
550 */
551 NRF_STATIC_INLINE uint32_t nrf_saadc_oversample_sample_count_get(nrf_saadc_oversample_t oversample);
552
553 /**
554 * @brief Function for enabling the continuous sampling.
555 *
556 * This function configures the SAADC internal timer to automatically take new samples at a fixed
557 * sample rate. Trigger the START task to begin continuous sampling. To stop the sampling, trigger
558 * the STOP task.
559 *
560 * @note The internal timer can only be used when a single input channel is enabled.
561 *
562 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
563 * @param[in] cc Capture and compare value. Sample rate is 16 MHz/cc.
564 * Valid @c CC range is from 80 to 2047.
565 */
566 NRF_STATIC_INLINE void nrf_saadc_continuous_mode_enable(NRF_SAADC_Type * p_reg,
567 uint16_t cc);
568
569 /**
570 * @brief Function for checking if the continuous sampling is enabled.
571 *
572 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
573 *
574 * @retval true The continuous sampling is enabled.
575 * @retval false The continuous sampling is disabled.
576 */
577 NRF_STATIC_INLINE bool nrf_saadc_continuous_mode_enable_check(NRF_SAADC_Type const * p_reg);
578
579 /**
580 * @brief Function for disabling the continuous sampling.
581 *
582 * New samples can still be acquired by manually triggering the SAMPLE task or by PPI.
583 *
584 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
585 */
586 NRF_STATIC_INLINE void nrf_saadc_continuous_mode_disable(NRF_SAADC_Type * p_reg);
587
588 /**
589 * @brief Function for initializing the SAADC channel.
590 *
591 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
592 * @param[in] channel Channel number.
593 * @param[in] config Pointer to the channel configuration structure.
594 */
595 NRF_STATIC_INLINE void nrf_saadc_channel_init(NRF_SAADC_Type * p_reg,
596 uint8_t channel,
597 nrf_saadc_channel_config_t const * config);
598
599 /**
600 * @brief Function for configuring the burst mode for the specified channel.
601 *
602 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
603 * @param[in] channel Channel number.
604 * @param[in] burst Burst mode setting.
605 */
606 NRF_STATIC_INLINE void nrf_saadc_burst_set(NRF_SAADC_Type * p_reg,
607 uint8_t channel,
608 nrf_saadc_burst_t burst);
609
610 /**
611 * @brief Function for getting the minimum value of the conversion result.
612 *
613 * The minimum value of the conversion result depends on the configured resolution.
614 *
615 * @param[in] resolution Bit resolution.
616 *
617 * @return Minimum value of the conversion result.
618 */
619 NRF_STATIC_INLINE nrf_saadc_value_t nrf_saadc_value_min_get(nrf_saadc_resolution_t resolution);
620
621 /**
622 * @brief Function for getting the maximum value of the conversion result.
623 *
624 * The maximum value of the conversion result depends on the configured resolution.
625 *
626 * @param[in] resolution Bit resolution.
627 *
628 * @return Maximum value of the conversion result.
629 */
630 NRF_STATIC_INLINE nrf_saadc_value_t nrf_saadc_value_max_get(nrf_saadc_resolution_t resolution);
631
632 #ifndef NRF_DECLARE_ONLY
633
nrf_saadc_task_trigger(NRF_SAADC_Type * p_reg,nrf_saadc_task_t task)634 NRF_STATIC_INLINE void nrf_saadc_task_trigger(NRF_SAADC_Type * p_reg, nrf_saadc_task_t task)
635 {
636 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
637 }
638
nrf_saadc_task_address_get(NRF_SAADC_Type const * p_reg,nrf_saadc_task_t task)639 NRF_STATIC_INLINE uint32_t nrf_saadc_task_address_get(NRF_SAADC_Type const * p_reg,
640 nrf_saadc_task_t task)
641 {
642 return (uint32_t)((uint8_t *)p_reg + (uint32_t)task);
643 }
644
nrf_saadc_event_check(NRF_SAADC_Type const * p_reg,nrf_saadc_event_t event)645 NRF_STATIC_INLINE bool nrf_saadc_event_check(NRF_SAADC_Type const * p_reg, nrf_saadc_event_t event)
646 {
647 return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
648 }
649
nrf_saadc_event_clear(NRF_SAADC_Type * p_reg,nrf_saadc_event_t event)650 NRF_STATIC_INLINE void nrf_saadc_event_clear(NRF_SAADC_Type * p_reg, nrf_saadc_event_t event)
651 {
652 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
653 nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);
654 }
655
nrf_saadc_event_address_get(NRF_SAADC_Type const * p_reg,nrf_saadc_event_t event)656 NRF_STATIC_INLINE uint32_t nrf_saadc_event_address_get(NRF_SAADC_Type const * p_reg,
657 nrf_saadc_event_t event)
658 {
659 return (uint32_t )((uint8_t *)p_reg + (uint32_t)event);
660 }
661
662 #if defined(DPPI_PRESENT)
nrf_saadc_subscribe_set(NRF_SAADC_Type * p_reg,nrf_saadc_task_t task,uint8_t channel)663 NRF_STATIC_INLINE void nrf_saadc_subscribe_set(NRF_SAADC_Type * p_reg,
664 nrf_saadc_task_t task,
665 uint8_t channel)
666 {
667 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
668 ((uint32_t)channel | SAADC_SUBSCRIBE_START_EN_Msk);
669 }
670
nrf_saadc_subscribe_clear(NRF_SAADC_Type * p_reg,nrf_saadc_task_t task)671 NRF_STATIC_INLINE void nrf_saadc_subscribe_clear(NRF_SAADC_Type * p_reg, nrf_saadc_task_t task)
672 {
673 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
674 }
675
nrf_saadc_publish_set(NRF_SAADC_Type * p_reg,nrf_saadc_event_t event,uint8_t channel)676 NRF_STATIC_INLINE void nrf_saadc_publish_set(NRF_SAADC_Type * p_reg,
677 nrf_saadc_event_t event,
678 uint8_t channel)
679 {
680 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
681 ((uint32_t)channel | SAADC_PUBLISH_STARTED_EN_Msk);
682 }
683
nrf_saadc_publish_clear(NRF_SAADC_Type * p_reg,nrf_saadc_event_t event)684 NRF_STATIC_INLINE void nrf_saadc_publish_clear(NRF_SAADC_Type * p_reg, nrf_saadc_event_t event)
685 {
686 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
687 }
688 #endif // defined(DPPI_PRESENT)
689
nrf_saadc_limit_event_get(uint8_t channel,nrf_saadc_limit_t limit_type)690 NRF_STATIC_INLINE nrf_saadc_event_t nrf_saadc_limit_event_get(uint8_t channel,
691 nrf_saadc_limit_t limit_type)
692 {
693 if (limit_type == NRF_SAADC_LIMIT_HIGH)
694 {
695 return (nrf_saadc_event_t)NRFX_OFFSETOF(NRF_SAADC_Type, EVENTS_CH[channel].LIMITH);
696 }
697 else
698 {
699 return (nrf_saadc_event_t)NRFX_OFFSETOF(NRF_SAADC_Type, EVENTS_CH[channel].LIMITL);
700 }
701 }
702
nrf_saadc_channel_input_set(NRF_SAADC_Type * p_reg,uint8_t channel,nrf_saadc_input_t pselp,nrf_saadc_input_t pseln)703 NRF_STATIC_INLINE void nrf_saadc_channel_input_set(NRF_SAADC_Type * p_reg,
704 uint8_t channel,
705 nrf_saadc_input_t pselp,
706 nrf_saadc_input_t pseln)
707 {
708 p_reg->CH[channel].PSELN = pseln;
709 p_reg->CH[channel].PSELP = pselp;
710 }
711
nrf_saadc_channel_pos_input_set(NRF_SAADC_Type * p_reg,uint8_t channel,nrf_saadc_input_t pselp)712 NRF_STATIC_INLINE void nrf_saadc_channel_pos_input_set(NRF_SAADC_Type * p_reg,
713 uint8_t channel,
714 nrf_saadc_input_t pselp)
715 {
716 p_reg->CH[channel].PSELP = pselp;
717 }
718
nrf_saadc_channel_limits_set(NRF_SAADC_Type * p_reg,uint8_t channel,int16_t low,int16_t high)719 NRF_STATIC_INLINE void nrf_saadc_channel_limits_set(NRF_SAADC_Type * p_reg,
720 uint8_t channel,
721 int16_t low,
722 int16_t high)
723 {
724 p_reg->CH[channel].LIMIT = (
725 (((uint32_t) low << SAADC_CH_LIMIT_LOW_Pos) & SAADC_CH_LIMIT_LOW_Msk)
726 | (((uint32_t) high << SAADC_CH_LIMIT_HIGH_Pos) & SAADC_CH_LIMIT_HIGH_Msk));
727 }
728
nrf_saadc_int_set(NRF_SAADC_Type * p_reg,uint32_t mask)729 NRF_STATIC_INLINE void nrf_saadc_int_set(NRF_SAADC_Type * p_reg, uint32_t mask)
730 {
731 p_reg->INTEN = mask;
732 }
733
nrf_saadc_int_enable(NRF_SAADC_Type * p_reg,uint32_t mask)734 NRF_STATIC_INLINE void nrf_saadc_int_enable(NRF_SAADC_Type * p_reg, uint32_t mask)
735 {
736 p_reg->INTENSET = mask;
737 }
738
nrf_saadc_int_enable_check(NRF_SAADC_Type const * p_reg,uint32_t mask)739 NRF_STATIC_INLINE uint32_t nrf_saadc_int_enable_check(NRF_SAADC_Type const * p_reg, uint32_t mask)
740 {
741 return p_reg->INTENSET & mask;
742 }
743
nrf_saadc_int_disable(NRF_SAADC_Type * p_reg,uint32_t mask)744 NRF_STATIC_INLINE void nrf_saadc_int_disable(NRF_SAADC_Type * p_reg, uint32_t mask)
745 {
746 p_reg->INTENCLR = mask;
747 }
748
nrf_saadc_limit_int_get(uint8_t channel,nrf_saadc_limit_t limit_type)749 NRF_STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel,
750 nrf_saadc_limit_t limit_type)
751 {
752 NRFX_ASSERT(channel < SAADC_CH_NUM);
753 uint32_t mask = (limit_type == NRF_SAADC_LIMIT_LOW) ?
754 NRF_SAADC_INT_CH0LIMITL : NRF_SAADC_INT_CH0LIMITH;
755 return mask << (channel * 2);
756 }
757
nrf_saadc_busy_check(NRF_SAADC_Type const * p_reg)758 NRF_STATIC_INLINE bool nrf_saadc_busy_check(NRF_SAADC_Type const * p_reg)
759 {
760 return (p_reg->STATUS == (SAADC_STATUS_STATUS_Busy << SAADC_STATUS_STATUS_Pos));
761 }
762
nrf_saadc_enable(NRF_SAADC_Type * p_reg)763 NRF_STATIC_INLINE void nrf_saadc_enable(NRF_SAADC_Type * p_reg)
764 {
765 p_reg->ENABLE = (SAADC_ENABLE_ENABLE_Enabled << SAADC_ENABLE_ENABLE_Pos);
766 }
767
nrf_saadc_disable(NRF_SAADC_Type * p_reg)768 NRF_STATIC_INLINE void nrf_saadc_disable(NRF_SAADC_Type * p_reg)
769 {
770 p_reg->ENABLE = (SAADC_ENABLE_ENABLE_Disabled << SAADC_ENABLE_ENABLE_Pos);
771 }
772
nrf_saadc_enable_check(NRF_SAADC_Type const * p_reg)773 NRF_STATIC_INLINE bool nrf_saadc_enable_check(NRF_SAADC_Type const * p_reg)
774 {
775 return (p_reg->ENABLE == (SAADC_ENABLE_ENABLE_Enabled << SAADC_ENABLE_ENABLE_Pos));
776 }
777
nrf_saadc_buffer_init(NRF_SAADC_Type * p_reg,nrf_saadc_value_t * p_buffer,uint32_t size)778 NRF_STATIC_INLINE void nrf_saadc_buffer_init(NRF_SAADC_Type * p_reg,
779 nrf_saadc_value_t * p_buffer,
780 uint32_t size)
781 {
782 p_reg->RESULT.PTR = (uint32_t)p_buffer;
783 p_reg->RESULT.MAXCNT = size;
784 }
785
nrf_saadc_buffer_pointer_set(NRF_SAADC_Type * p_reg,nrf_saadc_value_t * p_buffer)786 NRF_STATIC_INLINE void nrf_saadc_buffer_pointer_set(NRF_SAADC_Type * p_reg,
787 nrf_saadc_value_t * p_buffer)
788 {
789 p_reg->RESULT.PTR = (uint32_t)p_buffer;
790 }
791
nrf_saadc_buffer_pointer_get(NRF_SAADC_Type const * p_reg)792 NRF_STATIC_INLINE nrf_saadc_value_t * nrf_saadc_buffer_pointer_get(NRF_SAADC_Type const * p_reg)
793 {
794 return (nrf_saadc_value_t *)p_reg->RESULT.PTR;
795 }
796
nrf_saadc_amount_get(NRF_SAADC_Type const * p_reg)797 NRF_STATIC_INLINE uint16_t nrf_saadc_amount_get(NRF_SAADC_Type const * p_reg)
798 {
799 return p_reg->RESULT.AMOUNT;
800 }
801
nrf_saadc_resolution_set(NRF_SAADC_Type * p_reg,nrf_saadc_resolution_t resolution)802 NRF_STATIC_INLINE void nrf_saadc_resolution_set(NRF_SAADC_Type * p_reg,
803 nrf_saadc_resolution_t resolution)
804 {
805 p_reg->RESOLUTION = resolution;
806 }
807
nrf_saadc_resolution_get(NRF_SAADC_Type const * p_reg)808 NRF_STATIC_INLINE nrf_saadc_resolution_t nrf_saadc_resolution_get(NRF_SAADC_Type const * p_reg)
809 {
810 return (nrf_saadc_resolution_t)p_reg->RESOLUTION;
811 }
812
nrf_saadc_oversample_set(NRF_SAADC_Type * p_reg,nrf_saadc_oversample_t oversample)813 NRF_STATIC_INLINE void nrf_saadc_oversample_set(NRF_SAADC_Type * p_reg,
814 nrf_saadc_oversample_t oversample)
815 {
816 p_reg->OVERSAMPLE = oversample;
817 }
818
nrf_saadc_oversample_get(NRF_SAADC_Type const * p_reg)819 NRF_STATIC_INLINE nrf_saadc_oversample_t nrf_saadc_oversample_get(NRF_SAADC_Type const * p_reg)
820 {
821 return (nrf_saadc_oversample_t)p_reg->OVERSAMPLE;
822 }
823
nrf_saadc_oversample_sample_count_get(nrf_saadc_oversample_t oversample)824 NRF_STATIC_INLINE uint32_t nrf_saadc_oversample_sample_count_get(nrf_saadc_oversample_t oversample)
825 {
826 return (1 << (uint32_t)oversample);
827 }
828
nrf_saadc_continuous_mode_enable(NRF_SAADC_Type * p_reg,uint16_t cc)829 NRF_STATIC_INLINE void nrf_saadc_continuous_mode_enable(NRF_SAADC_Type * p_reg, uint16_t cc)
830 {
831 NRFX_ASSERT((cc >= 80) && (cc <= 2047));
832 p_reg->SAMPLERATE = (SAADC_SAMPLERATE_MODE_Timers << SAADC_SAMPLERATE_MODE_Pos)
833 | ((uint32_t)cc << SAADC_SAMPLERATE_CC_Pos);
834 }
835
nrf_saadc_continuous_mode_enable_check(NRF_SAADC_Type const * p_reg)836 NRF_STATIC_INLINE bool nrf_saadc_continuous_mode_enable_check(NRF_SAADC_Type const * p_reg)
837 {
838 return (bool)((p_reg->SAMPLERATE & SAADC_SAMPLERATE_MODE_Msk)
839 == (SAADC_SAMPLERATE_MODE_Timers << SAADC_SAMPLERATE_MODE_Pos));
840 }
841
nrf_saadc_continuous_mode_disable(NRF_SAADC_Type * p_reg)842 NRF_STATIC_INLINE void nrf_saadc_continuous_mode_disable(NRF_SAADC_Type * p_reg)
843 {
844 p_reg->SAMPLERATE = SAADC_SAMPLERATE_MODE_Task << SAADC_SAMPLERATE_MODE_Pos;
845 }
846
nrf_saadc_channel_init(NRF_SAADC_Type * p_reg,uint8_t channel,nrf_saadc_channel_config_t const * config)847 NRF_STATIC_INLINE void nrf_saadc_channel_init(NRF_SAADC_Type * p_reg,
848 uint8_t channel,
849 nrf_saadc_channel_config_t const * config)
850 {
851 p_reg->CH[channel].CONFIG =
852 ((config->resistor_p << SAADC_CH_CONFIG_RESP_Pos) & SAADC_CH_CONFIG_RESP_Msk)
853 | ((config->resistor_n << SAADC_CH_CONFIG_RESN_Pos) & SAADC_CH_CONFIG_RESN_Msk)
854 | ((config->gain << SAADC_CH_CONFIG_GAIN_Pos) & SAADC_CH_CONFIG_GAIN_Msk)
855 | ((config->reference << SAADC_CH_CONFIG_REFSEL_Pos) & SAADC_CH_CONFIG_REFSEL_Msk)
856 | ((config->acq_time << SAADC_CH_CONFIG_TACQ_Pos) & SAADC_CH_CONFIG_TACQ_Msk)
857 | ((config->mode << SAADC_CH_CONFIG_MODE_Pos) & SAADC_CH_CONFIG_MODE_Msk)
858 | ((config->burst << SAADC_CH_CONFIG_BURST_Pos) & SAADC_CH_CONFIG_BURST_Msk);
859 }
860
nrf_saadc_burst_set(NRF_SAADC_Type * p_reg,uint8_t channel,nrf_saadc_burst_t burst)861 NRF_STATIC_INLINE void nrf_saadc_burst_set(NRF_SAADC_Type * p_reg,
862 uint8_t channel,
863 nrf_saadc_burst_t burst)
864 {
865 p_reg->CH[channel].CONFIG = (p_reg->CH[channel].CONFIG & ~SAADC_CH_CONFIG_BURST_Msk) |
866 (burst << SAADC_CH_CONFIG_BURST_Pos);
867 }
868
nrf_saadc_value_min_get(nrf_saadc_resolution_t resolution)869 NRF_STATIC_INLINE nrf_saadc_value_t nrf_saadc_value_min_get(nrf_saadc_resolution_t resolution)
870 {
871 uint8_t res_bits = 0;
872 switch (resolution)
873 {
874 case NRF_SAADC_RESOLUTION_8BIT:
875 res_bits = 8;
876 break;
877 case NRF_SAADC_RESOLUTION_10BIT:
878 res_bits = 10;
879 break;
880 case NRF_SAADC_RESOLUTION_12BIT:
881 res_bits = 12;
882 break;
883 case NRF_SAADC_RESOLUTION_14BIT:
884 res_bits = 14;
885 break;
886 default:
887 NRFX_ASSERT(false);
888 }
889 return (nrf_saadc_value_t)(-(1 << res_bits));
890 }
891
nrf_saadc_value_max_get(nrf_saadc_resolution_t resolution)892 NRF_STATIC_INLINE nrf_saadc_value_t nrf_saadc_value_max_get(nrf_saadc_resolution_t resolution)
893 {
894 uint8_t res_bits = 0;
895 switch (resolution)
896 {
897 case NRF_SAADC_RESOLUTION_8BIT:
898 res_bits = 8;
899 break;
900 case NRF_SAADC_RESOLUTION_10BIT:
901 res_bits = 10;
902 break;
903 case NRF_SAADC_RESOLUTION_12BIT:
904 res_bits = 12;
905 break;
906 case NRF_SAADC_RESOLUTION_14BIT:
907 res_bits = 14;
908 break;
909 default:
910 NRFX_ASSERT(false);
911 }
912 return (nrf_saadc_value_t)((1 << res_bits) - 1);
913 }
914
915 #endif // NRF_DECLARE_ONLY
916
917 /** @} */
918
919 #ifdef __cplusplus
920 }
921 #endif
922
923 #endif // NRF_SAADC_H_
924