1 /******************************************************************************
2 *  Filename:       prcm.h
3 *  Revised:        2015-07-16 12:12:04 +0200 (Thu, 16 Jul 2015)
4 *  Revision:       44151
5 *
6 *  Description:    Defines and prototypes for the PRCM
7 *
8 *  Copyright (c) 2015, Texas Instruments Incorporated
9 *  All rights reserved.
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12 *  modification, are permitted provided that the following conditions are met:
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15 *     this list of conditions and the following disclaimer.
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25 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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38 
39 //*****************************************************************************
40 //
41 //! \addtogroup system_control_group
42 //! @{
43 //! \addtogroup prcm_api
44 //! @{
45 //
46 //*****************************************************************************
47 
48 #ifndef __PRCM_H__
49 #define __PRCM_H__
50 
51 //*****************************************************************************
52 //
53 // If building with a C++ compiler, make all of the definitions in this header
54 // have a C binding.
55 //
56 //*****************************************************************************
57 #ifdef __cplusplus
58 extern "C"
59 {
60 #endif
61 
62 #include <stdbool.h>
63 #include <stdint.h>
64 #include <inc/hw_types.h>
65 #include <inc/hw_memmap.h>
66 #include <inc/hw_ints.h>
67 #include <inc/hw_prcm.h>
68 #include <inc/hw_nvic.h>
69 #include <inc/hw_aon_rtc.h>
70 #include <driverlib/interrupt.h>
71 #include <driverlib/debug.h>
72 #include <driverlib/cpu.h>
73 
74 //*****************************************************************************
75 //
76 // Support for DriverLib in ROM:
77 // This section renames all functions that are not "static inline", so that
78 // calling these functions will default to implementation in flash. At the end
79 // of this file a second renaming will change the defaults to implementation in
80 // ROM for available functions.
81 //
82 // To force use of the implementation in flash, e.g. for debugging:
83 // - Globally: Define DRIVERLIB_NOROM at project level
84 // - Per function: Use prefix "NOROM_" when calling the function
85 //
86 //*****************************************************************************
87 #if !defined(DOXYGEN)
88     #define PRCMInfClockConfigureSet        NOROM_PRCMInfClockConfigureSet
89     #define PRCMInfClockConfigureGet        NOROM_PRCMInfClockConfigureGet
90     #define PRCMAudioClockConfigSet         NOROM_PRCMAudioClockConfigSet
91     #define PRCMAudioClockConfigSetOverride NOROM_PRCMAudioClockConfigSetOverride
92     #define PRCMPowerDomainOn               NOROM_PRCMPowerDomainOn
93     #define PRCMPowerDomainOff              NOROM_PRCMPowerDomainOff
94     #define PRCMPeripheralRunEnable         NOROM_PRCMPeripheralRunEnable
95     #define PRCMPeripheralRunDisable        NOROM_PRCMPeripheralRunDisable
96     #define PRCMPeripheralSleepEnable       NOROM_PRCMPeripheralSleepEnable
97     #define PRCMPeripheralSleepDisable      NOROM_PRCMPeripheralSleepDisable
98     #define PRCMPeripheralDeepSleepEnable   NOROM_PRCMPeripheralDeepSleepEnable
99     #define PRCMPeripheralDeepSleepDisable  NOROM_PRCMPeripheralDeepSleepDisable
100     #define PRCMPowerDomainStatus           NOROM_PRCMPowerDomainStatus
101     #define PRCMDeepSleep                   NOROM_PRCMDeepSleep
102 #endif
103 
104 //*****************************************************************************
105 //
106 // Defines for the different System CPU power modes.
107 //
108 //*****************************************************************************
109 #define PRCM_RUN_MODE           0x00000001
110 #define PRCM_SLEEP_MODE         0x00000002
111 #define PRCM_DEEP_SLEEP_MODE    0x00000004
112 
113 //*****************************************************************************
114 //
115 // Defines used for setting the clock division factors
116 //
117 //*****************************************************************************
118 #define PRCM_CLOCK_DIV_1        PRCM_GPTCLKDIV_RATIO_DIV1
119 #define PRCM_CLOCK_DIV_2        PRCM_GPTCLKDIV_RATIO_DIV2
120 #define PRCM_CLOCK_DIV_4        PRCM_GPTCLKDIV_RATIO_DIV4
121 #define PRCM_CLOCK_DIV_8        PRCM_GPTCLKDIV_RATIO_DIV8
122 #define PRCM_CLOCK_DIV_16       PRCM_GPTCLKDIV_RATIO_DIV16
123 #define PRCM_CLOCK_DIV_32       PRCM_GPTCLKDIV_RATIO_DIV32
124 #define PRCM_CLOCK_DIV_64       PRCM_GPTCLKDIV_RATIO_DIV64
125 #define PRCM_CLOCK_DIV_128      PRCM_GPTCLKDIV_RATIO_DIV128
126 #define PRCM_CLOCK_DIV_256      PRCM_GPTCLKDIV_RATIO_DIV256
127 
128 //*****************************************************************************
129 //
130 // Defines used for enabling and disabling domains and memories in the MCU
131 // domain
132 //
133 //*****************************************************************************
134 #define PRCM_DOMAIN_RFCORE      0x00000001  // RF Core domain ID for
135                                             // clock/power control.
136 #define PRCM_DOMAIN_SERIAL      0x00000002  // Serial domain ID for
137                                             // clock/power control.
138 #define PRCM_DOMAIN_PERIPH      0x00000004  // Peripheral domain ID for
139                                             // clock/power control.
140 #define PRCM_DOMAIN_SYSBUS      0x00000008  // Bus domain ID for clock/power
141                                             // control.
142 #define PRCM_DOMAIN_VIMS        0x00000010  // VIMS domain ID for clock/power
143                                             // control.
144 #define PRCM_DOMAIN_CPU         0x00000020  // CPU domain ID for clock/power
145                                             // control.
146 #define PRCM_DOMAIN_TIMER       0x00000040  // GPT domain ID for clock
147                                             // control.
148 #define PRCM_DOMAIN_CLKCTRL     0x00000080  // Clock Control domain ID for
149                                             // clock/power control.
150 #define PRCM_DOMAIN_MCU         0x00000100  // Reset control for entire MCU
151                                             // domain.
152 #define PRCM_DOMAIN_POWER_OFF   0x00000002  // The domain is powered off
153 #define PRCM_DOMAIN_POWER_ON    0x00000001  // The domain is powered on
154 #define PRCM_DOMAIN_POWER_DOWN_READY                                          \
155                                 0x00000000  // The domain is ready to be
156                                             // powered down.
157 
158 //*****************************************************************************
159 //
160 // Defines for setting up the audio interface in the I2S module.
161 //
162 //*****************************************************************************
163 #define PRCM_WCLK_NEG_EDGE      0x00000008
164 #define PRCM_WCLK_POS_EDGE      0x00000000
165 #define PRCM_WCLK_SINGLE_PHASE  0x00000000
166 #define PRCM_WCLK_DUAL_PHASE    0x00000002
167 #define PRCM_WCLK_USER_DEF      0x00000004
168 
169 #define I2S_SAMPLE_RATE_16K     0x00000001
170 #define I2S_SAMPLE_RATE_24K     0x00000002
171 #define I2S_SAMPLE_RATE_32K     0x00000004
172 #define I2S_SAMPLE_RATE_48K     0x00000008
173 
174 //*****************************************************************************
175 //
176 // Defines used for enabling and disabling peripheral modules in the MCU
177 // domain
178 //
179 //*****************************************************************************
180 #define PRCM_PERIPH_TIMER0      0x00000000  // Peripheral ID for GPT module 0
181 #define PRCM_PERIPH_TIMER1      0x00000001  // Peripheral ID for GPT module 1
182 #define PRCM_PERIPH_TIMER2      0x00000002  // Peripheral ID for GPT module 2
183 #define PRCM_PERIPH_TIMER3      0x00000003  // Peripheral ID for GPT module 3
184 #define PRCM_PERIPH_SSI0        0x00000100  // Peripheral ID for SSI module 0
185 #define PRCM_PERIPH_SSI1        0x00000101  // Peripheral ID for SSI module 1
186 #define PRCM_PERIPH_UART0       0x00000200  // Peripheral ID for UART module 0
187 #define PRCM_PERIPH_UART1       0x00000201  // Peripheral ID for UART module 1
188 #define PRCM_PERIPH_I2C0        0x00000300  // Peripheral ID for I2C module 0
189 #define PRCM_PERIPH_I2C1        0x00000301  // Peripheral ID for I2C module 1
190 #define PRCM_PERIPH_CRYPTO      0x00000400  // Peripheral ID for CRYPTO module
191 #define PRCM_PERIPH_TRNG        0x00000401  // Peripheral ID for TRNG module
192 #define PRCM_PERIPH_UDMA        0x00000408  // Peripheral ID for UDMA module
193 #define PRCM_PERIPH_GPIO        0x00000500  // Peripheral ID for GPIO module
194 #define PRCM_PERIPH_I2S         0x00000600  // Peripheral ID for I2S module
195 
196 //*****************************************************************************
197 //
198 // API Functions and prototypes
199 //
200 //*****************************************************************************
201 
202 #ifdef DRIVERLIB_DEBUG
203 //*****************************************************************************
204 //
205 //! \brief Checks a peripheral identifier.
206 //!
207 //! This function determines if a peripheral identifier is valid.
208 //!
209 //! \param ui32Peripheral is the peripheral identifier.
210 //!
211 //! \return Returns status of peripheral identifier:
212 //! - \b true  : Peripheral identifier is valid.
213 //! - \b false : Peripheral identifier is invalid.
214 //
215 //*****************************************************************************
216 static bool
PRCMPeripheralValid(uint32_t ui32Peripheral)217 PRCMPeripheralValid(uint32_t ui32Peripheral)
218 {
219     return((ui32Peripheral == PRCM_PERIPH_TIMER0)   ||
220            (ui32Peripheral == PRCM_PERIPH_TIMER1)   ||
221            (ui32Peripheral == PRCM_PERIPH_TIMER2)   ||
222            (ui32Peripheral == PRCM_PERIPH_TIMER3)   ||
223            (ui32Peripheral == PRCM_PERIPH_SSI0)     ||
224            (ui32Peripheral == PRCM_PERIPH_SSI1)     ||
225            (ui32Peripheral == PRCM_PERIPH_UART0)    ||
226            (ui32Peripheral == PRCM_PERIPH_UART1)    ||
227            (ui32Peripheral == PRCM_PERIPH_I2C0)     ||
228            (ui32Peripheral == PRCM_PERIPH_I2C1)     ||
229            (ui32Peripheral == PRCM_PERIPH_UDMA)     ||
230            (ui32Peripheral == PRCM_PERIPH_TRNG)     ||
231            (ui32Peripheral == PRCM_PERIPH_CRYPTO)   ||
232            (ui32Peripheral == PRCM_PERIPH_GPIO)     ||
233            (ui32Peripheral == PRCM_PERIPH_I2S));
234 }
235 #endif
236 
237 //*****************************************************************************
238 //
239 //! \brief Configure the infrastructure clock.
240 //!
241 //! Each System CPU power mode has its own infrastructure clock division factor. This
242 //! function can be used for setting up the division factor for the
243 //! infrastructure clock in the available power modes for the System CPU. The
244 //! infrastructure clock is used for all internal logic in the PRCM, and is
245 //! always running as long as power is on in the MCU voltage domain.
246 //! This can be enabled and disabled from the AON Wake Up Controller.
247 //!
248 //! \note If source clock is 48 MHz, minimum clock divider is \ref PRCM_CLOCK_DIV_2.
249 //!
250 //! \param ui32ClkDiv determines the division ratio for the infrastructure
251 //! clock when the device is in the specified mode.
252 //! Allowed division factors for all three System CPU power modes are:
253 //! - \ref PRCM_CLOCK_DIV_1
254 //! - \ref PRCM_CLOCK_DIV_2
255 //! - \ref PRCM_CLOCK_DIV_8
256 //! - \ref PRCM_CLOCK_DIV_32
257 //! \param ui32PowerMode determines the System CPU operation mode for which to
258 //! modify the clock division factor.
259 //! The three allowed power modes are:
260 //! - \ref PRCM_RUN_MODE
261 //! - \ref PRCM_SLEEP_MODE
262 //! - \ref PRCM_DEEP_SLEEP_MODE
263 //!
264 //! \return None
265 //
266 //*****************************************************************************
267 extern void PRCMInfClockConfigureSet(uint32_t ui32ClkDiv,
268                                      uint32_t ui32PowerMode);
269 
270 //*****************************************************************************
271 //
272 //! \brief Use this function to get the infrastructure clock configuration.
273 //!
274 //! \param ui32PowerMode determines which System CPU power mode to return the
275 //! infrastructure clock division ratio for.
276 //! The three allowed power modes are:
277 //! - \ref PRCM_RUN_MODE
278 //! - \ref PRCM_SLEEP_MODE
279 //! - \ref PRCM_DEEP_SLEEP_MODE
280 //!
281 //! \return Returns the infrastructure clock division factor for the specified
282 //! power mode.
283 //! - \ref PRCM_CLOCK_DIV_1
284 //! - \ref PRCM_CLOCK_DIV_2
285 //! - \ref PRCM_CLOCK_DIV_8
286 //! - \ref PRCM_CLOCK_DIV_32
287 //!
288 //! \sa \ref PRCMInfClockConfigureSet().
289 //
290 //*****************************************************************************
291 extern uint32_t PRCMInfClockConfigureGet(uint32_t ui32PowerMode);
292 
293 //*****************************************************************************
294 //
295 //! \brief Request a power off of the MCU voltage domain.
296 //!
297 //! Use this function to request a power off of the entire MCU voltage domain.
298 //! This request will have no affect until deepsleep mode is requested.
299 //!
300 //! \return None
301 //!
302 //! \sa \ref PRCMDeepSleep(), \ref PRCMMcuPowerOffCancel()
303 //
304 //*****************************************************************************
305 __STATIC_INLINE void
PRCMMcuPowerOff(void)306 PRCMMcuPowerOff(void)
307 {
308     //
309     // Assert the power off request signal.
310     //
311     HWREGBITW(PRCM_BASE + PRCM_O_VDCTL, PRCM_VDCTL_MCU_VD_BITN) = 1;
312 }
313 
314 //*****************************************************************************
315 //
316 //! \brief Cancel a request for a power off of the MCU voltage domain.
317 //!
318 //! Use this function to cancel a request for power off of the entire MCU
319 //! voltage domain. This could be relevant if a transition to power down is
320 //! regretted and an application must backtrack.
321 //!
322 //! \return None
323 //!
324 //! \sa \ref PRCMDeepSleep(), \ref PRCMMcuPowerOff()
325 //
326 //*****************************************************************************
327 __STATIC_INLINE void
PRCMMcuPowerOffCancel(void)328 PRCMMcuPowerOffCancel(void)
329 {
330     //
331     // Assert the power off request signal.
332     //
333     HWREGBITW(PRCM_BASE + PRCM_O_VDCTL, PRCM_VDCTL_MCU_VD_BITN) = 0;
334 }
335 
336 //*****************************************************************************
337 //
338 //! \brief Assert or de-assert a request for the uLDO.
339 //!
340 //! Use this function to request to switch to the micro Low Voltage Dropout
341 //! regulator (uLDO). The uLDO has a much lower capacity for supplying power
342 //! to the system. It is therefore imperative and solely the programmers
343 //! responsibility to ensure that a sufficient amount of peripheral modules
344 //! have been turned of before requesting a switch to the uLDO.
345 //!
346 //! \note Asserting this bit has no effect until:
347 //! 1. FLASH has accepted to be powered down
348 //! 2. Deepsleep must be asserted
349 //!
350 //! \param ui32Enable
351 //! - 0 : Disable uLDO request
352 //! - 1 : Enable uLDO request
353 //!
354 //! \return None
355 //!
356 //! \sa \ref PRCMDeepSleep()
357 //
358 //*****************************************************************************
359 __STATIC_INLINE void
PRCMMcuUldoConfigure(uint32_t ui32Enable)360 PRCMMcuUldoConfigure(uint32_t ui32Enable)
361 {
362     // Enable or disable the uLDO request signal.
363     HWREGBITW(PRCM_BASE + PRCM_O_VDCTL, PRCM_VDCTL_ULDO_BITN) = ui32Enable;
364 }
365 
366 //*****************************************************************************
367 //
368 //! \brief Setup the clock division factor for the GP-Timer domain.
369 //!
370 //! Use this function to set up the clock division factor on the GP-Timer.
371 //!
372 //! The division rate will be constant and ungated for Run / Sleep / DeepSleep mode when
373 //! it is slower than PRCM_GPTCLKDIV_RATIO setting.
374 //! When set faster than PRCM_GPTCLKDIV_RATIO setting PRCM_GPTCLKDIV_RATIO will be used.
375 //! Note that the register will contain the written content even though the setting is
376 //! faster than PRCM_GPTCLKDIV_RATIO setting.
377 //!
378 //! \note For change to take effect, \ref PRCMLoadSet() needs to be called
379 //!
380 //! \param clkDiv is the division factor to set.
381 //! The argument must be only one of the following values:
382 //! - \ref PRCM_CLOCK_DIV_1
383 //! - \ref PRCM_CLOCK_DIV_2
384 //! - \ref PRCM_CLOCK_DIV_4
385 //! - \ref PRCM_CLOCK_DIV_8
386 //! - \ref PRCM_CLOCK_DIV_16
387 //! - \ref PRCM_CLOCK_DIV_32
388 //! - \ref PRCM_CLOCK_DIV_64
389 //! - \ref PRCM_CLOCK_DIV_128
390 //! - \ref PRCM_CLOCK_DIV_256
391 //!
392 //! \return None
393 //!
394 //! \sa \ref PRCMGPTimerClockDivisionGet()
395 //
396 //*****************************************************************************
397 __STATIC_INLINE void
PRCMGPTimerClockDivisionSet(uint32_t clkDiv)398 PRCMGPTimerClockDivisionSet( uint32_t clkDiv )
399 {
400     ASSERT( clkDiv <= PRCM_GPTCLKDIV_RATIO_DIV256 );
401 
402     HWREG( PRCM_BASE + PRCM_O_GPTCLKDIV ) = clkDiv;
403 }
404 
405 //*****************************************************************************
406 //
407 //! \brief Get the clock division factor for the GP-Timer domain.
408 //!
409 //! Use this function to get the clock division factor set for the GP-Timer.
410 //!
411 //! \return Returns one of the following values:
412 //! - \ref PRCM_CLOCK_DIV_1
413 //! - \ref PRCM_CLOCK_DIV_2
414 //! - \ref PRCM_CLOCK_DIV_4
415 //! - \ref PRCM_CLOCK_DIV_8
416 //! - \ref PRCM_CLOCK_DIV_16
417 //! - \ref PRCM_CLOCK_DIV_32
418 //! - \ref PRCM_CLOCK_DIV_64
419 //! - \ref PRCM_CLOCK_DIV_128
420 //! - \ref PRCM_CLOCK_DIV_256
421 //!
422 //! \sa \ref PRCMGPTimerClockDivisionSet()
423 //
424 //*****************************************************************************
425 __STATIC_INLINE uint32_t
PRCMGPTimerClockDivisionGet(void)426 PRCMGPTimerClockDivisionGet( void )
427 {
428     return ( HWREG( PRCM_BASE + PRCM_O_GPTCLKDIV ));
429 }
430 
431 
432 //*****************************************************************************
433 //
434 //! \brief Enable the audio clock generation.
435 //!
436 //! Use this function to enable the audio clock generation.
437 //!
438 //! \return None
439 //
440 //*****************************************************************************
441 __STATIC_INLINE void
PRCMAudioClockEnable(void)442 PRCMAudioClockEnable(void)
443 {
444     // Enable the audio clock generation.
445     HWREGBITW(PRCM_BASE + PRCM_O_I2SCLKCTL, PRCM_I2SCLKCTL_EN_BITN) = 1;
446 }
447 
448 //*****************************************************************************
449 //
450 //! \brief Disable the audio clock generation.
451 //!
452 //! Use this function to disable the audio clock generation.
453 //!
454 //! \return None
455 //
456 //*****************************************************************************
457 __STATIC_INLINE void
PRCMAudioClockDisable(void)458 PRCMAudioClockDisable(void)
459 {
460     // Disable the audio clock generation
461     HWREGBITW(PRCM_BASE + PRCM_O_I2SCLKCTL, PRCM_I2SCLKCTL_EN_BITN) = 0;
462 }
463 
464 //*****************************************************************************
465 //
466 //! \brief Configure the audio clock generation.
467 //!
468 //! Use this function to set the sample rate when using internal audio clock
469 //! generation for the I2S module.
470 //!
471 //! \note While other clocks are possible, the stability of the four sample
472 //! rates defined here are only guaranteed if the clock input to the I2S module
473 //! is 48MHz.
474 //!
475 //! \param ui32ClkConfig is the audio clock configuration.
476 //! The parameter is a bitwise OR'ed value consisting of:
477 //! - Phase
478 //!   - \ref PRCM_WCLK_SINGLE_PHASE
479 //!   - \ref PRCM_WCLK_DUAL_PHASE
480 //! - Clock polarity
481 //!   - \ref PRCM_WCLK_NEG_EDGE
482 //!   - \ref PRCM_WCLK_POS_EDGE
483 //! \param ui32SampleRate is the desired audio clock sample rate.
484 //! The supported sample rate configurations are:
485 //! - \ref I2S_SAMPLE_RATE_16K
486 //! - \ref I2S_SAMPLE_RATE_24K
487 //! - \ref I2S_SAMPLE_RATE_32K
488 //! - \ref I2S_SAMPLE_RATE_48K
489 //!
490 //! \return None
491 //!
492 //! \sa \ref PRCMAudioClockConfigSetOverride()
493 //
494 //*****************************************************************************
495 extern void PRCMAudioClockConfigSet(uint32_t ui32ClkConfig,
496                                     uint32_t ui32SampleRate);
497 
498 //*****************************************************************************
499 //
500 //! \brief Configure the audio clock generation with manual setting of clock divider.
501 //!
502 //! Use this function to set the audio clock divider values manually.
503 //!
504 //! \note See hardware documentation before setting audio clock dividers manually.
505 //!
506 //! \param ui32ClkConfig is the audio clock configuration.
507 //! The parameter is a bitwise OR'ed value consisting of:
508 //! - Phase
509 //!   - \ref PRCM_WCLK_SINGLE_PHASE
510 //!   - \ref PRCM_WCLK_DUAL_PHASE
511 //! - Clock polarity
512 //!   - \ref PRCM_WCLK_NEG_EDGE
513 //!   - \ref PRCM_WCLK_POS_EDGE
514 //! \param ui32MstDiv is the desired master clock divider.
515 //! \param ui32WordDiv is the desired word clock divider.
516 //! \param ui32BitDiv is the desired bit clock divider.
517 //!
518 //! \return None
519 //!
520 //! \sa \ref PRCMAudioClockConfigSet()
521 //
522 //*****************************************************************************
523 extern void PRCMAudioClockConfigSetOverride(uint32_t ui32ClkConfig, uint32_t ui32MstDiv,
524                         uint32_t ui32BitDiv, uint32_t ui32WordDiv);
525 
526 //*****************************************************************************
527 //
528 //! \brief Use this function to synchronize the load settings.
529 //!
530 //! Most of the clock settings in the PRCM module should be updated
531 //! synchronously. This is ensured by the implementation of a load registers
532 //! that, when written to, will let the previous written update values for all
533 //! the relevant registers propagate through to hardware.
534 //!
535 //! The functions that require a synchronization of the clock settings are:
536 //! - \ref PRCMAudioClockConfigSet()
537 //! - \ref PRCMAudioClockConfigSetOverride()
538 //! - \ref PRCMAudioClockDisable()
539 //! - \ref PRCMDomainEnable()
540 //! - \ref PRCMDomainDisable()
541 //! - \ref PRCMPeripheralRunEnable()
542 //! - \ref PRCMPeripheralRunEnable()
543 //! - \ref PRCMPeripheralSleepEnable()
544 //! - \ref PRCMPeripheralSleepEnable()
545 //! - \ref PRCMPeripheralDeepSleepEnable()
546 //! - \ref PRCMPeripheralDeepSleepEnable()
547 //!
548 //! \return None
549 //!
550 //! \sa \ref PRCMLoadGet()
551 //
552 //*****************************************************************************
553 __STATIC_INLINE void
PRCMLoadSet(void)554 PRCMLoadSet(void)
555 {
556     //
557     // Enable the update of all load related registers.
558     //
559     HWREG(PRCM_NONBUF_BASE + PRCM_O_CLKLOADCTL) = PRCM_CLKLOADCTL_LOAD;
560 }
561 
562 //*****************************************************************************
563 //
564 //! \brief Check if any of the load sensitive register has been updated.
565 //!
566 //! \return Returns status of the load sensitive register:
567 //! - \c true  : No registers have changed since the last load.
568 //! - \c false : Any register has changed.
569 //!
570 //! \sa \ref PRCMLoadSet()
571 //
572 //*****************************************************************************
573 __STATIC_INLINE bool
PRCMLoadGet(void)574 PRCMLoadGet(void)
575 {
576     //
577     // Return the load status.
578     //
579     return ((HWREG(PRCM_BASE + PRCM_O_CLKLOADCTL) & PRCM_CLKLOADCTL_LOAD_DONE) ?
580             true : false);
581 }
582 
583 //*****************************************************************************
584 //
585 //! \brief Enable clock domains in the MCU voltage domain.
586 //!
587 //! \note A call to this function will only setup the shadow registers in the
588 //! MCU domain for the PRCM module. For the changes to propagate to the system
589 //! controller in the AON domain a call to this function should always be
590 //! followed by a call to \ref PRCMLoadSet().
591 //!
592 //! \note Clocks will only be running if the domain is powered.
593 //!
594 //! \param ui32Domains is a bit mask containing the clock domains to enable.
595 //! The independent clock domains inside the MCU voltage domain which can be
596 //! configured are:
597 //! - \ref PRCM_DOMAIN_RFCORE
598 //! - \ref PRCM_DOMAIN_VIMS
599 //!
600 //! \return None
601 //
602 //*****************************************************************************
603 __STATIC_INLINE void
PRCMDomainEnable(uint32_t ui32Domains)604 PRCMDomainEnable(uint32_t ui32Domains)
605 {
606     //
607     // Check the arguments.
608     //
609     ASSERT((ui32Domains & PRCM_DOMAIN_RFCORE) ||
610            (ui32Domains & PRCM_DOMAIN_VIMS));
611 
612     //
613     // Enable the clock domain(s).
614     //
615     if(ui32Domains & PRCM_DOMAIN_RFCORE)
616     {
617         HWREG(PRCM_BASE + PRCM_O_RFCCLKG) = PRCM_RFCCLKG_CLK_EN;
618     }
619     if(ui32Domains & PRCM_DOMAIN_VIMS)
620     {
621         HWREG(PRCM_BASE + PRCM_O_VIMSCLKG) = PRCM_VIMSCLKG_CLK_EN_M;
622     }
623 }
624 
625 //*****************************************************************************
626 //
627 //! \brief Disable clock domains in the MCU voltage domain.
628 //!
629 //! \note A call to this function will only setup the shadow registers in the
630 //! MCU domain for the PRCM module. For the changes to propagate to the system
631 //! controller in the AON domain a call to this function should always be
632 //! followed by a call to \ref PRCMLoadSet().
633 //!
634 //! \note Clocks will only be running if the domain is powered.
635 //!
636 //! \param ui32Domains is a bit mask containing the clock domains to disable.
637 //! The independent clock domains inside the MCU voltage domain are:
638 //! - \ref PRCM_DOMAIN_RFCORE
639 //! - \ref PRCM_DOMAIN_VIMS
640 //!
641 //! \return None
642 //!
643 //! \sa PRCMDomainEnable()
644 //
645 //*****************************************************************************
646 __STATIC_INLINE void
PRCMDomainDisable(uint32_t ui32Domains)647 PRCMDomainDisable(uint32_t ui32Domains)
648 {
649     //
650     // Check the arguments.
651     //
652     ASSERT((ui32Domains & PRCM_DOMAIN_RFCORE) ||
653            (ui32Domains & PRCM_DOMAIN_VIMS));
654 
655     //
656     // Disable the power domains.
657     //
658     if(ui32Domains & PRCM_DOMAIN_RFCORE)
659     {
660         HWREG(PRCM_BASE + PRCM_O_RFCCLKG) = 0x0;
661     }
662     if(ui32Domains & PRCM_DOMAIN_VIMS)
663     {
664         HWREG(PRCM_BASE + PRCM_O_VIMSCLKG) = 0x0;
665     }
666 }
667 
668 //*****************************************************************************
669 //
670 //! \brief Turn power on in power domains in the MCU domain.
671 //!
672 //! Use this function to turn on power domains inside the MCU voltage
673 //! domain.
674 //!
675 //! Power on and power off request has different implications for the
676 //! different power domains.
677 //! - RF Core power domain:
678 //!   - Power On : Domain is on or in the process of turning on.
679 //!   - Power Off: Domain is powered down when System CPU is in deep sleep. The third
680 //!                option for the RF Core is to power down when the it is idle.
681 //!                This can be set using \b PRCMRfPowerDownWhenIdle()
682 //! - SERIAL power domain:
683 //!   - Power on : Domain is powered on.
684 //!   - Power off : Domain is powered off.
685 //! - PERIPHERIAL power domain:
686 //!   - Power on : Domain is powered on.
687 //!   - Power off : Domain is powered off.
688 //! - VIMS power domain:
689 //!   - Power On: Domain is powered if Bus domain is powered.
690 //!   - Power Off: Domain is only powered when CPU domain is on.
691 //! - BUS power domain:
692 //!   - Power On: Domain is on.
693 //!   - Power Off: Domain is on if requested by RF Core or if CPU domain is on.
694 //! - CPU power domain:
695 //!   - Power On: Domain is on.
696 //!   - Power Off: Domain is powering down if System CPU is idle. This will also
697 //!                initiate a power down of the SRAM and BUS power domains, unless
698 //!                RF Core is requesting them to be on.
699 //!
700 //! \note After a call to this function the status of the power domain should
701 //! be checked using either \ref PRCMPowerDomainStatus().
702 //! Any write operation to a power domain which is still not operational can
703 //! result in unexpected behavior.
704 //!
705 //! \param ui32Domains determines which power domains to turn on.
706 //! The domains that can be turned on/off are:
707 //! - \b PRCM_DOMAIN_RFCORE : RF Core
708 //! - \b PRCM_DOMAIN_SERIAL : SSI0, UART0, I2C0
709 //! - \b PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S,
710 //!                           DMA, UART1, I2C1
711 //! - \b PRCM_DOMAIN_VIMS   : SRAM, FLASH, ROM
712 //! - \b PRCM_DOMAIN_SYSBUS
713 //! - \b PRCM_DOMAIN_CPU
714 //!
715 //! \return None
716 //
717 //*****************************************************************************
718 extern void PRCMPowerDomainOn(uint32_t ui32Domains);
719 
720 //*****************************************************************************
721 //
722 //! \brief Turn off a specific power domain.
723 //!
724 //! Use this function to power down domains inside the MCU voltage
725 //! domain.
726 //!
727 //! \note For specifics regarding on/off configuration please see
728 //! \ref PRCMPowerDomainOn().
729 //!
730 //! \param ui32Domains determines which domain to request a power down for.
731 //! The domains that can be turned on/off are:
732 //! - \b PRCM_DOMAIN_RFCORE : RF Core
733 //! - \b PRCM_DOMAIN_SERIAL : SSI0, UART0, I2C0
734 //! - \b PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S,
735 //!                           DMA, UART1, I2C1
736 //! - \b PRCM_DOMAIN_VIMS   : SRAM, FLASH, ROM
737 //! - \b PRCM_DOMAIN_SYSBUS
738 //! - \b PRCM_DOMAIN_CPU
739 //!
740 //! \return None
741 //
742 //*****************************************************************************
743 extern void PRCMPowerDomainOff(uint32_t ui32Domains);
744 
745 //*****************************************************************************
746 //
747 //! \brief Configure RF core to power down when idle.
748 //!
749 //! Use this function to configure the RF core to power down when Idle. This
750 //! is handled automatically in hardware if the RF Core reports that it is
751 //! idle.
752 //!
753 //! \return None
754 //
755 //*****************************************************************************
756 __STATIC_INLINE void
PRCMRfPowerDownWhenIdle(void)757 PRCMRfPowerDownWhenIdle(void)
758 {
759     // Configure the RF power domain.
760     HWREGBITW(PRCM_BASE + PRCM_O_PDCTL0RFC, PRCM_PDCTL0RFC_ON_BITN) = 0;
761 }
762 
763 //*****************************************************************************
764 //
765 //! \brief Enables a peripheral in Run mode.
766 //!
767 //! Peripherals are enabled with this function.  At power-up, some peripherals
768 //! are disabled; they must be enabled in order to operate or respond to
769 //! register reads/writes.
770 //!
771 //! \note The actual enabling of the peripheral may be delayed until some
772 //! time after this function returns. Care should be taken to ensure that the
773 //! peripheral is not accessed until it is enabled.
774 //! When enabling Timers always make sure that the division factor for the
775 //! \b PERBUSCPUCLK is set. This will guarantee that the timers run at a
776 //! continuous rate even if the \b SYSBUSCLK is gated.
777 //!
778 //! \note A call to this function will only setup the shadow registers in the
779 //! MCU domain for the PRCM module. For the changes to propagate to the system
780 //! controller in the AON domain a call to this function should always be
781 //! followed by a call to \ref PRCMLoadSet().
782 //!
783 //! \param ui32Peripheral is the peripheral to enable.
784 //! The parameter must be one of the following:
785 //! - \ref PRCM_PERIPH_TIMER0
786 //! - \ref PRCM_PERIPH_TIMER1
787 //! - \ref PRCM_PERIPH_TIMER2
788 //! - \ref PRCM_PERIPH_TIMER3
789 //! - \ref PRCM_PERIPH_SSI0
790 //! - \ref PRCM_PERIPH_SSI1
791 //! - \ref PRCM_PERIPH_UART0
792 //! - \ref PRCM_PERIPH_UART1
793 //! - \ref PRCM_PERIPH_I2C0
794 //! - \ref PRCM_PERIPH_I2C1
795 //! - \ref PRCM_PERIPH_CRYPTO
796 //! - \ref PRCM_PERIPH_TRNG
797 //! - \ref PRCM_PERIPH_UDMA
798 //! - \ref PRCM_PERIPH_GPIO
799 //! - \ref PRCM_PERIPH_I2S
800 //!
801 //! \return None
802 //!
803 //! \sa \ref PRCMLoadSet()
804 //
805 //*****************************************************************************
806 extern void PRCMPeripheralRunEnable(uint32_t ui32Peripheral);
807 
808 //*****************************************************************************
809 //
810 //! Disables a peripheral in Run mode
811 //!
812 //! Peripherals are disabled with this function. Once disabled, they will not
813 //! operate or respond to register reads/writes.
814 //!
815 //! \note A call to this function will only setup the shadow registers in the
816 //! MCU domain for the PRCM module. For the changes to propagate to the system
817 //! controller in the AON domain a call to this function should always be
818 //! followed by a call to \ref PRCMLoadSet().
819 //!
820 //! \note The actual disabling of the peripheral may be delayed until some
821 //! time after this function returns. Care should be taken by the user to
822 //! ensure that the peripheral is not accessed in this interval as this might
823 //! cause the system to hang.
824 //!
825 //! \param ui32Peripheral is the peripheral to disable.
826 //! The parameter must be one of the following:
827 //! - \ref PRCM_PERIPH_TIMER0
828 //! - \ref PRCM_PERIPH_TIMER1
829 //! - \ref PRCM_PERIPH_TIMER2
830 //! - \ref PRCM_PERIPH_TIMER3
831 //! - \ref PRCM_PERIPH_SSI0
832 //! - \ref PRCM_PERIPH_SSI1
833 //! - \ref PRCM_PERIPH_UART0
834 //! - \ref PRCM_PERIPH_UART1
835 //! - \ref PRCM_PERIPH_I2C0
836 //! - \ref PRCM_PERIPH_I2C1
837 //! - \ref PRCM_PERIPH_CRYPTO
838 //! - \ref PRCM_PERIPH_TRNG
839 //! - \ref PRCM_PERIPH_UDMA
840 //! - \ref PRCM_PERIPH_GPIO
841 //! - \ref PRCM_PERIPH_I2S
842 //!
843 //! \return None
844 //!
845 //! \sa \ref PRCMLoadSet()
846 //
847 //*****************************************************************************
848 extern void PRCMPeripheralRunDisable(uint32_t ui32Peripheral);
849 
850 //*****************************************************************************
851 //
852 //! \brief Enables a peripheral in sleep mode.
853 //!
854 //! This function allows a peripheral to continue operating when the processor
855 //! goes into sleep mode. Since the clocking configuration of the device does
856 //! not change, any peripheral can safely continue operating while the
857 //! processor is in sleep mode, and can therefore wake the processor from sleep
858 //! mode.
859 //!
860 //! \note A call to this function will only setup the shadow registers in the
861 //! MCU domain for the PRCM module. For the changes to propagate to the system
862 //! controller in the AON domain a call to this function should always be
863 //! followed by a call to \ref PRCMLoadSet().
864 //!
865 //! \param ui32Peripheral is the peripheral to enable in sleep mode.
866 //! The parameter must be one of the following:
867 //! - \ref PRCM_PERIPH_TIMER0
868 //! - \ref PRCM_PERIPH_TIMER1
869 //! - \ref PRCM_PERIPH_TIMER2
870 //! - \ref PRCM_PERIPH_TIMER3
871 //! - \ref PRCM_PERIPH_SSI0
872 //! - \ref PRCM_PERIPH_SSI1
873 //! - \ref PRCM_PERIPH_UART0
874 //! - \ref PRCM_PERIPH_UART1
875 //! - \ref PRCM_PERIPH_I2C0
876 //! - \ref PRCM_PERIPH_I2C1
877 //! - \ref PRCM_PERIPH_CRYPTO
878 //! - \ref PRCM_PERIPH_TRNG
879 //! - \ref PRCM_PERIPH_UDMA
880 //! - \ref PRCM_PERIPH_GPIO
881 //! - \ref PRCM_PERIPH_I2S
882 //!
883 //! \return None
884 //!
885 //! \sa \ref PRCMLoadSet()
886 //
887 //*****************************************************************************
888 extern void PRCMPeripheralSleepEnable(uint32_t ui32Peripheral);
889 
890 //*****************************************************************************
891 //
892 //! \brief Disables a peripheral in sleep mode.
893 //!
894 //! This function causes a peripheral to stop operating when the processor goes
895 //! into sleep mode. Disabling peripherals while in sleep mode helps to lower
896 //! the current draw of the device. If enabled (via \ref PRCMPeripheralRunEnable()),
897 //! the peripheral will automatically resume operation when the processor
898 //! leaves sleep mode, maintaining its entire state from before sleep mode was
899 //! entered.
900 //!
901 //! \note A call to this function will only setup the shadow registers in the
902 //! MCU domain for the PRCM module. For the changes to propagate to the system
903 //! controller in the AON domain a call to this function should always be
904 //! followed by a call to \ref PRCMLoadSet().
905 //!
906 //! \param ui32Peripheral is the peripheral to disable in sleep mode.
907 //! The parameter must be one of the following:
908 //! - \ref PRCM_PERIPH_TIMER0
909 //! - \ref PRCM_PERIPH_TIMER1
910 //! - \ref PRCM_PERIPH_TIMER2
911 //! - \ref PRCM_PERIPH_TIMER3
912 //! - \ref PRCM_PERIPH_SSI0
913 //! - \ref PRCM_PERIPH_SSI1
914 //! - \ref PRCM_PERIPH_UART0
915 //! - \ref PRCM_PERIPH_UART1
916 //! - \ref PRCM_PERIPH_I2C0
917 //! - \ref PRCM_PERIPH_I2C1
918 //! - \ref PRCM_PERIPH_CRYPTO
919 //! - \ref PRCM_PERIPH_TRNG
920 //! - \ref PRCM_PERIPH_UDMA
921 //! - \ref PRCM_PERIPH_GPIO
922 //! - \ref PRCM_PERIPH_I2S
923 //!
924 //! \return None
925 //!
926 //! \sa \ref PRCMLoadSet()
927 //
928 //*****************************************************************************
929 extern void PRCMPeripheralSleepDisable(uint32_t ui32Peripheral);
930 
931 //*****************************************************************************
932 //
933 //! \brief Enables a peripheral in deep-sleep mode.
934 //!
935 //! This function allows a peripheral to continue operating when the processor
936 //! goes into deep-sleep mode.  Since the clocking configuration of the device
937 //! may change, not all peripherals can safely continue operating while the
938 //! processor is in sleep mode. This in turn depends on the chosen power mode.
939 //! It is the responsibility of the caller to make sensible choices.
940 //!
941 //! \note A call to this function will only setup the shadow registers in the
942 //! MCU domain for the PRCM module. For the changes to propagate to the system
943 //! controller in the AON domain a call to this function should always be
944 //! followed by a call to \ref PRCMLoadSet().
945 //!
946 //! \param ui32Peripheral is the peripheral to enable in deep-sleep mode.
947 //! The parameter must be one of the following:
948 //! - \ref PRCM_PERIPH_TIMER0
949 //! - \ref PRCM_PERIPH_TIMER1
950 //! - \ref PRCM_PERIPH_TIMER2
951 //! - \ref PRCM_PERIPH_TIMER3
952 //! - \ref PRCM_PERIPH_SSI0
953 //! - \ref PRCM_PERIPH_SSI1
954 //! - \ref PRCM_PERIPH_UART0
955 //! - \ref PRCM_PERIPH_UART1
956 //! - \ref PRCM_PERIPH_I2C0
957 //! - \ref PRCM_PERIPH_I2C1
958 //! - \ref PRCM_PERIPH_CRYPTO
959 //! - \ref PRCM_PERIPH_TRNG
960 //! - \ref PRCM_PERIPH_UDMA
961 //! - \ref PRCM_PERIPH_GPIO
962 //! - \ref PRCM_PERIPH_I2S
963 //!
964 //! \return None
965 //!
966 //! \sa \ref PRCMLoadSet()
967 //
968 //*****************************************************************************
969 extern void PRCMPeripheralDeepSleepEnable(uint32_t ui32Peripheral);
970 
971 //*****************************************************************************
972 //
973 //! \brief Disables a peripheral in deep-sleep mode.
974 //!
975 //! This function causes a peripheral to stop operating when the processor goes
976 //! into deep-sleep mode.  Disabling peripherals while in deep-sleep mode helps
977 //! to lower the current draw of the device, and can keep peripherals that
978 //! require a particular clock frequency from operating when the clock changes
979 //! as a result of entering deep-sleep mode.  If enabled (via
980 //! \ref PRCMPeripheralRunEnable()), the peripheral will automatically resume
981 //! operation when the processor leaves deep-sleep mode, maintaining its entire
982 //! state from before deep-sleep mode was entered.
983 //!
984 //! \note A call to this function will only setup the shadow registers in the
985 //! MCU domain for the PRCM module. For the changes to propagate to the system
986 //! controller in the AON domain a call to this function should always be
987 //! followed by a call to \ref PRCMLoadSet().
988 //!
989 //! \param ui32Peripheral is the peripheral to disable in deep-sleep mode.
990 //! The parameter must be one of the following:
991 //! - \ref PRCM_PERIPH_TIMER0
992 //! - \ref PRCM_PERIPH_TIMER1
993 //! - \ref PRCM_PERIPH_TIMER2
994 //! - \ref PRCM_PERIPH_TIMER3
995 //! - \ref PRCM_PERIPH_SSI0
996 //! - \ref PRCM_PERIPH_SSI1
997 //! - \ref PRCM_PERIPH_UART0
998 //! - \ref PRCM_PERIPH_UART1
999 //! - \ref PRCM_PERIPH_I2C0
1000 //! - \ref PRCM_PERIPH_I2C1
1001 //! - \ref PRCM_PERIPH_CRYPTO
1002 //! - \ref PRCM_PERIPH_TRNG
1003 //! - \ref PRCM_PERIPH_UDMA
1004 //! - \ref PRCM_PERIPH_GPIO
1005 //! - \ref PRCM_PERIPH_I2S
1006 //!
1007 //! \return None
1008 //!
1009 //! \sa \ref PRCMLoadSet()
1010 //
1011 //*****************************************************************************
1012 extern void PRCMPeripheralDeepSleepDisable(uint32_t ui32Peripheral);
1013 
1014 //*****************************************************************************
1015 //
1016 //! \brief Get the status for a specific power domain.
1017 //!
1018 //! Use this function to retrieve the current power status of one or more
1019 //! power domains.
1020 //!
1021 //! \param ui32Domains determines which domain to get the power status for.
1022 //! The parameter must be an OR'ed combination of one or several of:
1023 //! - \ref PRCM_DOMAIN_RFCORE : RF Core.
1024 //! - \ref PRCM_DOMAIN_SERIAL : SSI0, UART0, I2C0
1025 //! - \ref PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S, DMA, UART1, I2C1
1026 //!
1027 //! \return Returns status of the requested domains:
1028 //! - \ref PRCM_DOMAIN_POWER_ON  : The specified domains are \b all powered up.
1029 //! This status is unconditional and the powered up status is guaranteed.
1030 //! - \ref PRCM_DOMAIN_POWER_OFF : Any of the domains are powered down.
1031 //
1032 //*****************************************************************************
1033 extern uint32_t PRCMPowerDomainStatus(uint32_t ui32Domains);
1034 
1035 //*****************************************************************************
1036 //
1037 //! \brief Return the access status of the RF Core.
1038 //!
1039 //! Use this function to check if the RF Core is on and ready to be accessed.
1040 //! Accessing register or memories that are not powered and clocked will
1041 //! cause a bus fault.
1042 //!
1043 //! \return Returns access status of the RF Core.
1044 //! - \c true  : RF Core can be accessed.
1045 //! - \c false : RF Core domain is not ready for access.
1046 //
1047 //*****************************************************************************
1048 __STATIC_INLINE bool
PRCMRfReady(void)1049 PRCMRfReady(void)
1050 {
1051     //
1052     // Return the ready status of the RF Core.
1053     //
1054     return ((HWREG(PRCM_BASE + PRCM_O_PDSTAT1RFC) &
1055              PRCM_PDSTAT1RFC_ON) ? true : false);
1056 }
1057 
1058 
1059 //*****************************************************************************
1060 //
1061 //! \brief Put the processor into sleep mode.
1062 //!
1063 //! This function places the processor into sleep mode; it does not return
1064 //! until the processor returns to run mode.  The peripherals that are enabled
1065 //! via \brief PRCMPeripheralSleepEnable() continue to operate and can wake up the
1066 //! processor.
1067 //!
1068 //! \return None
1069 //!
1070 //! \sa \ref PRCMPeripheralSleepEnable()
1071 //
1072 //*****************************************************************************
1073 __STATIC_INLINE void
PRCMSleep(void)1074 PRCMSleep(void)
1075 {
1076     //
1077     // Wait for an interrupt.
1078     //
1079     CPUwfi();
1080 }
1081 
1082 //*****************************************************************************
1083 //
1084 //! \brief Put the processor into deep-sleep mode.
1085 //!
1086 //! This function places the processor into deep-sleep mode; it does not return
1087 //! until the processor returns to run mode.  The peripherals that are enabled
1088 //! via \ref PRCMPeripheralDeepSleepEnable() continue to operate and can wake up
1089 //! the processor.
1090 //!
1091 //! \return None
1092 //!
1093 //! \sa \ref PRCMPeripheralDeepSleepEnable()
1094 //
1095 //*****************************************************************************
1096 extern void PRCMDeepSleep(void);
1097 
1098 //*****************************************************************************
1099 //
1100 //! \brief Enable CACHE RAM retention
1101 //!
1102 //! Enables CACHE RAM retention on both VIMS_TRAM and VIMS_CRAM
1103 //!
1104 //! \return None
1105 //
1106 //*****************************************************************************
1107 __STATIC_INLINE void
PRCMCacheRetentionEnable(void)1108 PRCMCacheRetentionEnable( void )
1109 {
1110    HWREG( PRCM_BASE + PRCM_O_RAMRETEN ) |= PRCM_RAMRETEN_VIMS_M;
1111 }
1112 
1113 //*****************************************************************************
1114 //
1115 //! \brief Disable CACHE RAM retention
1116 //!
1117 //! Disables CACHE RAM retention on both VIMS_TRAM and VIMS_CRAM
1118 //!
1119 //! \return None
1120 //
1121 //*****************************************************************************
1122 __STATIC_INLINE void
PRCMCacheRetentionDisable(void)1123 PRCMCacheRetentionDisable( void )
1124 {
1125    HWREG( PRCM_BASE + PRCM_O_RAMRETEN ) &= ~PRCM_RAMRETEN_VIMS_M;
1126 }
1127 
1128 
1129 //*****************************************************************************
1130 //
1131 // Support for DriverLib in ROM:
1132 // Redirect to implementation in ROM when available.
1133 //
1134 //*****************************************************************************
1135 #if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
1136     #include <driverlib/rom.h>
1137     #ifdef ROM_PRCMInfClockConfigureSet
1138         #undef  PRCMInfClockConfigureSet
1139         #define PRCMInfClockConfigureSet        ROM_PRCMInfClockConfigureSet
1140     #endif
1141     #ifdef ROM_PRCMInfClockConfigureGet
1142         #undef  PRCMInfClockConfigureGet
1143         #define PRCMInfClockConfigureGet        ROM_PRCMInfClockConfigureGet
1144     #endif
1145     #ifdef ROM_PRCMAudioClockConfigSet
1146         #undef  PRCMAudioClockConfigSet
1147         #define PRCMAudioClockConfigSet         ROM_PRCMAudioClockConfigSet
1148     #endif
1149     #ifdef ROM_PRCMAudioClockConfigSetOverride
1150         #undef  PRCMAudioClockConfigSetOverride
1151         #define PRCMAudioClockConfigSetOverride ROM_PRCMAudioClockConfigSetOverride
1152     #endif
1153     #ifdef ROM_PRCMPowerDomainOn
1154         #undef  PRCMPowerDomainOn
1155         #define PRCMPowerDomainOn               ROM_PRCMPowerDomainOn
1156     #endif
1157     #ifdef ROM_PRCMPowerDomainOff
1158         #undef  PRCMPowerDomainOff
1159         #define PRCMPowerDomainOff              ROM_PRCMPowerDomainOff
1160     #endif
1161     #ifdef ROM_PRCMPeripheralRunEnable
1162         #undef  PRCMPeripheralRunEnable
1163         #define PRCMPeripheralRunEnable         ROM_PRCMPeripheralRunEnable
1164     #endif
1165     #ifdef ROM_PRCMPeripheralRunDisable
1166         #undef  PRCMPeripheralRunDisable
1167         #define PRCMPeripheralRunDisable        ROM_PRCMPeripheralRunDisable
1168     #endif
1169     #ifdef ROM_PRCMPeripheralSleepEnable
1170         #undef  PRCMPeripheralSleepEnable
1171         #define PRCMPeripheralSleepEnable       ROM_PRCMPeripheralSleepEnable
1172     #endif
1173     #ifdef ROM_PRCMPeripheralSleepDisable
1174         #undef  PRCMPeripheralSleepDisable
1175         #define PRCMPeripheralSleepDisable      ROM_PRCMPeripheralSleepDisable
1176     #endif
1177     #ifdef ROM_PRCMPeripheralDeepSleepEnable
1178         #undef  PRCMPeripheralDeepSleepEnable
1179         #define PRCMPeripheralDeepSleepEnable   ROM_PRCMPeripheralDeepSleepEnable
1180     #endif
1181     #ifdef ROM_PRCMPeripheralDeepSleepDisable
1182         #undef  PRCMPeripheralDeepSleepDisable
1183         #define PRCMPeripheralDeepSleepDisable  ROM_PRCMPeripheralDeepSleepDisable
1184     #endif
1185     #ifdef ROM_PRCMPowerDomainStatus
1186         #undef  PRCMPowerDomainStatus
1187         #define PRCMPowerDomainStatus           ROM_PRCMPowerDomainStatus
1188     #endif
1189     #ifdef ROM_PRCMDeepSleep
1190         #undef  PRCMDeepSleep
1191         #define PRCMDeepSleep                   ROM_PRCMDeepSleep
1192     #endif
1193 #endif
1194 
1195 //*****************************************************************************
1196 //
1197 // Mark the end of the C bindings section for C++ compilers.
1198 //
1199 //*****************************************************************************
1200 #ifdef __cplusplus
1201 }
1202 #endif
1203 
1204 #endif // __PRCM_H__
1205 
1206 //*****************************************************************************
1207 //
1208 //! Close the Doxygen group.
1209 //! @}
1210 //! @}
1211 //
1212 //*****************************************************************************
1213