1 /*
2 * Copyright (c) 2014 - 2020, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this
9 * list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #ifndef NRF_TIMER_H__
33 #define NRF_TIMER_H__
34
35 #include <nrfx.h>
36
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40
41 /**
42 * @defgroup nrf_timer_hal TIMER HAL
43 * @{
44 * @ingroup nrf_timer
45 * @brief Hardware access layer for managing the TIMER peripheral.
46 */
47
48 /**
49 * @brief Macro for getting the maximum bit resolution of the specified timer instance.
50 *
51 * @param[in] id Index of the specified timer instance.
52 *
53 * @retval Maximum bit resolution of the specified timer instance.
54 */
55 #define TIMER_MAX_SIZE(id) NRFX_CONCAT_3(TIMER, id, _MAX_SIZE)
56
57 /**
58 * @brief Macro for validating the correctness of the bit width resolution setting.
59 *
60 * @param[in] id Index of the specified timer instance.
61 * @param[in] bit_width Bit width resolution value to be checked.
62 *
63 * @retval true Timer instance supports the specified bit width resolution value.
64 * @retval false Timer instance does not support the specified bit width resolution value.
65 */
66 #define TIMER_BIT_WIDTH_MAX(id, bit_width) \
67 (TIMER_MAX_SIZE(id) == 8 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) : \
68 (TIMER_MAX_SIZE(id) == 16 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
69 (bit_width == NRF_TIMER_BIT_WIDTH_16) : \
70 (TIMER_MAX_SIZE(id) == 24 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
71 (bit_width == NRF_TIMER_BIT_WIDTH_16) || \
72 (bit_width == NRF_TIMER_BIT_WIDTH_24) : \
73 (TIMER_MAX_SIZE(id) == 32 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
74 (bit_width == NRF_TIMER_BIT_WIDTH_16) || \
75 (bit_width == NRF_TIMER_BIT_WIDTH_24) || \
76 (bit_width == NRF_TIMER_BIT_WIDTH_32) : \
77 false))))
78
79 /**
80 * @brief Macro for checking correctness of bit width configuration for the specified timer.
81 *
82 * @param[in] p_reg Timer instance register.
83 * @param[in] bit_width Bit width resolution value to be checked.
84 *
85 * @retval true Timer instance supports the specified bit width resolution value.
86 * @retval false Timer instance does not support the specified bit width resolution value.
87 */
88 #if (TIMER_COUNT == 3) || defined(__NRFX_DOXYGEN__)
89 #define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \
90 ((p_reg == NRF_TIMER0) && TIMER_BIT_WIDTH_MAX(0, bit_width)) \
91 || ((p_reg == NRF_TIMER1) && TIMER_BIT_WIDTH_MAX(1, bit_width)) \
92 || ((p_reg == NRF_TIMER2) && TIMER_BIT_WIDTH_MAX(2, bit_width)))
93 #elif (TIMER_COUNT == 4)
94 #define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \
95 ((p_reg == NRF_TIMER0) && TIMER_BIT_WIDTH_MAX(0, bit_width)) \
96 || ((p_reg == NRF_TIMER1) && TIMER_BIT_WIDTH_MAX(1, bit_width)) \
97 || ((p_reg == NRF_TIMER2) && TIMER_BIT_WIDTH_MAX(2, bit_width)) \
98 || ((p_reg == NRF_TIMER3) && TIMER_BIT_WIDTH_MAX(3, bit_width)))
99 #elif (TIMER_COUNT == 5)
100 #define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \
101 ((p_reg == NRF_TIMER0) && TIMER_BIT_WIDTH_MAX(0, bit_width)) \
102 || ((p_reg == NRF_TIMER1) && TIMER_BIT_WIDTH_MAX(1, bit_width)) \
103 || ((p_reg == NRF_TIMER2) && TIMER_BIT_WIDTH_MAX(2, bit_width)) \
104 || ((p_reg == NRF_TIMER3) && TIMER_BIT_WIDTH_MAX(3, bit_width)) \
105 || ((p_reg == NRF_TIMER4) && TIMER_BIT_WIDTH_MAX(4, bit_width)))
106 #else
107 #error "Not supported timer count"
108 #endif
109
110 /**
111 * @brief Macro for getting the number of capture/compare channels available
112 * in a given timer instance.
113 *
114 * @param[in] id Index of the specified timer instance.
115 */
116 #define NRF_TIMER_CC_CHANNEL_COUNT(id) NRFX_CONCAT_3(TIMER, id, _CC_NUM)
117
118
119 /** @brief Timer tasks. */
120 typedef enum
121 {
122 NRF_TIMER_TASK_START = offsetof(NRF_TIMER_Type, TASKS_START), ///< Task for starting the timer.
123 NRF_TIMER_TASK_STOP = offsetof(NRF_TIMER_Type, TASKS_STOP), ///< Task for stopping the timer.
124 NRF_TIMER_TASK_COUNT = offsetof(NRF_TIMER_Type, TASKS_COUNT), ///< Task for incrementing the timer (in counter mode).
125 NRF_TIMER_TASK_CLEAR = offsetof(NRF_TIMER_Type, TASKS_CLEAR), ///< Task for resetting the timer value.
126 NRF_TIMER_TASK_SHUTDOWN = offsetof(NRF_TIMER_Type, TASKS_SHUTDOWN), ///< Task for powering off the timer.
127 NRF_TIMER_TASK_CAPTURE0 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[0]), ///< Task for capturing the timer value on channel 0.
128 NRF_TIMER_TASK_CAPTURE1 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[1]), ///< Task for capturing the timer value on channel 1.
129 NRF_TIMER_TASK_CAPTURE2 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[2]), ///< Task for capturing the timer value on channel 2.
130 NRF_TIMER_TASK_CAPTURE3 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[3]), ///< Task for capturing the timer value on channel 3.
131 #if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__)
132 NRF_TIMER_TASK_CAPTURE4 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[4]), ///< Task for capturing the timer value on channel 4.
133 #endif
134 #if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__)
135 NRF_TIMER_TASK_CAPTURE5 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[5]), ///< Task for capturing the timer value on channel 5.
136 #endif
137 #if defined(TIMER_INTENSET_COMPARE6_Msk) || defined(__NRFX_DOXYGEN__)
138 NRF_TIMER_TASK_CAPTURE6 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[6]), ///< Task for capturing the timer value on channel 6.
139 #endif
140 #if defined(TIMER_INTENSET_COMPARE7_Msk) || defined(__NRFX_DOXYGEN__)
141 NRF_TIMER_TASK_CAPTURE7 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[7]), ///< Task for capturing the timer value on channel 7.
142 #endif
143 } nrf_timer_task_t;
144
145 /** @brief Timer events. */
146 typedef enum
147 {
148 NRF_TIMER_EVENT_COMPARE0 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[0]), ///< Event from compare channel 0.
149 NRF_TIMER_EVENT_COMPARE1 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[1]), ///< Event from compare channel 1.
150 NRF_TIMER_EVENT_COMPARE2 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[2]), ///< Event from compare channel 2.
151 NRF_TIMER_EVENT_COMPARE3 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[3]), ///< Event from compare channel 3.
152 #if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__)
153 NRF_TIMER_EVENT_COMPARE4 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[4]), ///< Event from compare channel 4.
154 #endif
155 #if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__)
156 NRF_TIMER_EVENT_COMPARE5 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[5]), ///< Event from compare channel 5.
157 #endif
158 #if defined(TIMER_INTENSET_COMPARE6_Msk) || defined(__NRFX_DOXYGEN__)
159 NRF_TIMER_EVENT_COMPARE6 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[6]), ///< Event from compare channel 6.
160 #endif
161 #if defined(TIMER_INTENSET_COMPARE7_Msk) || defined(__NRFX_DOXYGEN__)
162 NRF_TIMER_EVENT_COMPARE7 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[7]), ///< Event from compare channel 7.
163 #endif
164 } nrf_timer_event_t;
165
166 /** @brief Types of timer shortcuts. */
167 typedef enum
168 {
169 NRF_TIMER_SHORT_COMPARE0_STOP_MASK = TIMER_SHORTS_COMPARE0_STOP_Msk, ///< Shortcut for stopping the timer based on compare 0.
170 NRF_TIMER_SHORT_COMPARE1_STOP_MASK = TIMER_SHORTS_COMPARE1_STOP_Msk, ///< Shortcut for stopping the timer based on compare 1.
171 NRF_TIMER_SHORT_COMPARE2_STOP_MASK = TIMER_SHORTS_COMPARE2_STOP_Msk, ///< Shortcut for stopping the timer based on compare 2.
172 NRF_TIMER_SHORT_COMPARE3_STOP_MASK = TIMER_SHORTS_COMPARE3_STOP_Msk, ///< Shortcut for stopping the timer based on compare 3.
173 #if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__)
174 NRF_TIMER_SHORT_COMPARE4_STOP_MASK = TIMER_SHORTS_COMPARE4_STOP_Msk, ///< Shortcut for stopping the timer based on compare 4.
175 #endif
176 #if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__)
177 NRF_TIMER_SHORT_COMPARE5_STOP_MASK = TIMER_SHORTS_COMPARE5_STOP_Msk, ///< Shortcut for stopping the timer based on compare 5.
178 #endif
179 NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK = TIMER_SHORTS_COMPARE0_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 0.
180 NRF_TIMER_SHORT_COMPARE1_CLEAR_MASK = TIMER_SHORTS_COMPARE1_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 1.
181 NRF_TIMER_SHORT_COMPARE2_CLEAR_MASK = TIMER_SHORTS_COMPARE2_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 2.
182 NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK = TIMER_SHORTS_COMPARE3_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 3.
183 #if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__)
184 NRF_TIMER_SHORT_COMPARE4_CLEAR_MASK = TIMER_SHORTS_COMPARE4_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 4.
185 #endif
186 #if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__)
187 NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK = TIMER_SHORTS_COMPARE5_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 5.
188 #endif
189 } nrf_timer_short_mask_t;
190
191 /** @brief Timer modes. */
192 typedef enum
193 {
194 NRF_TIMER_MODE_TIMER = TIMER_MODE_MODE_Timer, ///< Timer mode: timer.
195 NRF_TIMER_MODE_COUNTER = TIMER_MODE_MODE_Counter, ///< Timer mode: counter.
196 #if defined(TIMER_MODE_MODE_LowPowerCounter) || defined(__NRFX_DOXYGEN__)
197 NRF_TIMER_MODE_LOW_POWER_COUNTER = TIMER_MODE_MODE_LowPowerCounter, ///< Timer mode: low-power counter.
198 #endif
199 } nrf_timer_mode_t;
200
201 /** @brief Timer bit width. */
202 typedef enum
203 {
204 NRF_TIMER_BIT_WIDTH_8 = TIMER_BITMODE_BITMODE_08Bit, ///< Timer bit width 8 bit.
205 NRF_TIMER_BIT_WIDTH_16 = TIMER_BITMODE_BITMODE_16Bit, ///< Timer bit width 16 bit.
206 NRF_TIMER_BIT_WIDTH_24 = TIMER_BITMODE_BITMODE_24Bit, ///< Timer bit width 24 bit.
207 NRF_TIMER_BIT_WIDTH_32 = TIMER_BITMODE_BITMODE_32Bit ///< Timer bit width 32 bit.
208 } nrf_timer_bit_width_t;
209
210 /** @brief Timer prescalers. */
211 typedef enum
212 {
213 NRF_TIMER_FREQ_16MHz = 0, ///< Timer frequency 16 MHz.
214 NRF_TIMER_FREQ_8MHz, ///< Timer frequency 8 MHz.
215 NRF_TIMER_FREQ_4MHz, ///< Timer frequency 4 MHz.
216 NRF_TIMER_FREQ_2MHz, ///< Timer frequency 2 MHz.
217 NRF_TIMER_FREQ_1MHz, ///< Timer frequency 1 MHz.
218 NRF_TIMER_FREQ_500kHz, ///< Timer frequency 500 kHz.
219 NRF_TIMER_FREQ_250kHz, ///< Timer frequency 250 kHz.
220 NRF_TIMER_FREQ_125kHz, ///< Timer frequency 125 kHz.
221 NRF_TIMER_FREQ_62500Hz, ///< Timer frequency 62500 Hz.
222 NRF_TIMER_FREQ_31250Hz ///< Timer frequency 31250 Hz.
223 } nrf_timer_frequency_t;
224
225 /** @brief Timer capture/compare channels. */
226 typedef enum
227 {
228 NRF_TIMER_CC_CHANNEL0 = 0, ///< Timer capture/compare channel 0.
229 NRF_TIMER_CC_CHANNEL1, ///< Timer capture/compare channel 1.
230 NRF_TIMER_CC_CHANNEL2, ///< Timer capture/compare channel 2.
231 NRF_TIMER_CC_CHANNEL3, ///< Timer capture/compare channel 3.
232 #if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__)
233 NRF_TIMER_CC_CHANNEL4, ///< Timer capture/compare channel 4.
234 #endif
235 #if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__)
236 NRF_TIMER_CC_CHANNEL5, ///< Timer capture/compare channel 5.
237 #endif
238 } nrf_timer_cc_channel_t;
239
240 /** @brief Timer interrupts. */
241 typedef enum
242 {
243 NRF_TIMER_INT_COMPARE0_MASK = TIMER_INTENSET_COMPARE0_Msk, ///< Timer interrupt from compare event on channel 0.
244 NRF_TIMER_INT_COMPARE1_MASK = TIMER_INTENSET_COMPARE1_Msk, ///< Timer interrupt from compare event on channel 1.
245 NRF_TIMER_INT_COMPARE2_MASK = TIMER_INTENSET_COMPARE2_Msk, ///< Timer interrupt from compare event on channel 2.
246 NRF_TIMER_INT_COMPARE3_MASK = TIMER_INTENSET_COMPARE3_Msk, ///< Timer interrupt from compare event on channel 3.
247 #if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__)
248 NRF_TIMER_INT_COMPARE4_MASK = TIMER_INTENSET_COMPARE4_Msk, ///< Timer interrupt from compare event on channel 4.
249 #endif
250 #if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__)
251 NRF_TIMER_INT_COMPARE5_MASK = TIMER_INTENSET_COMPARE5_Msk, ///< Timer interrupt from compare event on channel 5.
252 #endif
253 } nrf_timer_int_mask_t;
254
255
256 /**
257 * @brief Function for activating the specified timer task.
258 *
259 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
260 * @param[in] task Task to be activated.
261 */
262 NRF_STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,
263 nrf_timer_task_t task);
264
265 /**
266 * @brief Function for getting the address of the specified timer task register.
267 *
268 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
269 * @param[in] task The specified task.
270 *
271 * @return Address of the specified task register.
272 */
273 NRF_STATIC_INLINE uint32_t nrf_timer_task_address_get(NRF_TIMER_Type const * p_reg,
274 nrf_timer_task_t task);
275
276 /**
277 * @brief Function for clearing the specified timer event.
278 *
279 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
280 * @param[in] event Event to clear.
281 */
282 NRF_STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
283 nrf_timer_event_t event);
284
285 /**
286 * @brief Function for retrieving the state of the TIMER event.
287 *
288 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
289 * @param[in] event Event to be checked.
290 *
291 * @retval true The event has been generated.
292 * @retval false The event has not been generated.
293 */
294 NRF_STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type const * p_reg,
295 nrf_timer_event_t event);
296
297 /**
298 * @brief Function for getting the address of the specified timer event register.
299 *
300 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
301 * @param[in] event The specified event.
302 *
303 * @return Address of the specified event register.
304 */
305 NRF_STATIC_INLINE uint32_t nrf_timer_event_address_get(NRF_TIMER_Type const * p_reg,
306 nrf_timer_event_t event);
307
308 /**
309 * @brief Function for enabling the specified shortcuts.
310 *
311 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
312 * @param[in] mask Shortcuts to be enabled.
313 */
314 NRF_STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
315 uint32_t mask);
316
317 /**
318 * @brief Function for disabling the specified shortcuts.
319 *
320 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
321 * @param[in] mask Shortcuts to be disabled.
322 */
323 NRF_STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
324 uint32_t mask);
325
326 /**
327 * @brief Function for setting the specified shortcuts.
328 *
329 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
330 * @param[in] mask Shortcuts to be set.
331 */
332 NRF_STATIC_INLINE void nrf_timer_shorts_set(NRF_TIMER_Type * p_reg,
333 uint32_t mask);
334
335 /**
336 * @brief Function for enabling the specified interrupts.
337 *
338 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
339 * @param[in] mask Mask of interrupts to be enabled.
340 */
341 NRF_STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
342 uint32_t mask);
343
344 /**
345 * @brief Function for disabling the specified interrupts.
346 *
347 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
348 * @param[in] mask Mask of interrupts to be disabled.
349 */
350 NRF_STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
351 uint32_t mask);
352
353 /**
354 * @brief Function for checking if the specified interrupts are enabled.
355 *
356 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
357 * @param[in] mask Mask of interrupts to be checked.
358 *
359 * @return Mask of enabled interrupts.
360 */
361 NRF_STATIC_INLINE uint32_t nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg, uint32_t mask);
362
363 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
364 /**
365 * @brief Function for setting the subscribe configuration for a given
366 * TIMER task.
367 *
368 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
369 * @param[in] task Task for which to set the configuration.
370 * @param[in] channel Channel through which to subscribe events.
371 */
372 NRF_STATIC_INLINE void nrf_timer_subscribe_set(NRF_TIMER_Type * p_reg,
373 nrf_timer_task_t task,
374 uint8_t channel);
375
376 /**
377 * @brief Function for clearing the subscribe configuration for a given
378 * TIMER task.
379 *
380 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
381 * @param[in] task Task for which to clear the configuration.
382 */
383 NRF_STATIC_INLINE void nrf_timer_subscribe_clear(NRF_TIMER_Type * p_reg,
384 nrf_timer_task_t task);
385
386 /**
387 * @brief Function for setting the publish configuration for a given
388 * TIMER event.
389 *
390 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
391 * @param[in] event Event for which to set the configuration.
392 * @param[in] channel Channel through which to publish the event.
393 */
394 NRF_STATIC_INLINE void nrf_timer_publish_set(NRF_TIMER_Type * p_reg,
395 nrf_timer_event_t event,
396 uint8_t channel);
397
398 /**
399 * @brief Function for clearing the publish configuration for a given
400 * TIMER event.
401 *
402 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
403 * @param[in] event Event for which to clear the configuration.
404 */
405 NRF_STATIC_INLINE void nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,
406 nrf_timer_event_t event);
407 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
408
409 /**
410 * @brief Function for setting the timer mode.
411 *
412 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
413 * @param[in] mode Timer mode.
414 */
415 NRF_STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg,
416 nrf_timer_mode_t mode);
417
418 /**
419 * @brief Function for retrieving the timer mode.
420 *
421 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
422 *
423 * @return Timer mode.
424 */
425 NRF_STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type const * p_reg);
426
427 /**
428 * @brief Function for setting the timer bit width.
429 *
430 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
431 * @param[in] bit_width Timer bit width.
432 */
433 NRF_STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
434 nrf_timer_bit_width_t bit_width);
435
436 /**
437 * @brief Function for retrieving the timer bit width.
438 *
439 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
440 *
441 * @return Timer bit width.
442 */
443 NRF_STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type const * p_reg);
444
445 /**
446 * @brief Function for setting the timer frequency.
447 *
448 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
449 * @param[in] frequency Timer frequency.
450 */
451 NRF_STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_reg,
452 nrf_timer_frequency_t frequency);
453
454 /**
455 * @brief Function for retrieving the timer frequency.
456 *
457 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
458 *
459 * @return Timer frequency.
460 */
461 NRF_STATIC_INLINE nrf_timer_frequency_t nrf_timer_frequency_get(NRF_TIMER_Type const * p_reg);
462
463 /**
464 * @brief Function for setting the capture/compare register for the specified channel.
465 *
466 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
467 * @param[in] cc_channel The specified capture/compare channel.
468 * @param[in] cc_value Value to write to the capture/compare register.
469 */
470 NRF_STATIC_INLINE void nrf_timer_cc_set(NRF_TIMER_Type * p_reg,
471 nrf_timer_cc_channel_t cc_channel,
472 uint32_t cc_value);
473
474 /**
475 * @brief Function for retrieving the capture/compare value for a specified channel.
476 *
477 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
478 * @param[in] cc_channel The specified capture/compare channel.
479 *
480 * @return Value from the specified capture/compare register.
481 */
482 NRF_STATIC_INLINE uint32_t nrf_timer_cc_get(NRF_TIMER_Type const * p_reg,
483 nrf_timer_cc_channel_t cc_channel);
484
485 /**
486 * @brief Function for getting the specified timer capture task.
487 *
488 * @param[in] channel Capture channel.
489 *
490 * @return Capture task.
491 */
492 NRF_STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint32_t channel);
493
494 /**
495 * @brief Function for getting the specified timer compare event.
496 *
497 * @param[in] channel Compare channel.
498 *
499 * @return Compare event.
500 */
501 NRF_STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint32_t channel);
502
503 /**
504 * @brief Function for getting the specified timer compare interrupt.
505 *
506 * @param[in] channel Compare channel.
507 *
508 * @return Compare interrupt.
509 */
510 NRF_STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint32_t channel);
511
512 /**
513 * @brief Function for calculating the number of timer ticks for a given time
514 * (in microseconds) and timer frequency.
515 *
516 * @param[in] time_us Time in microseconds.
517 * @param[in] frequency Timer frequency.
518 *
519 * @return Number of timer ticks.
520 */
521 NRF_STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us,
522 nrf_timer_frequency_t frequency);
523
524 /**
525 * @brief Function for calculating the number of timer ticks for a given time
526 * (in milliseconds) and timer frequency.
527 *
528 * @param[in] time_ms Time in milliseconds.
529 * @param[in] frequency Timer frequency.
530 *
531 * @return Number of timer ticks.
532 */
533 NRF_STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
534 nrf_timer_frequency_t frequency);
535
536 #if defined(TIMER_ONESHOTEN_ONESHOTEN_Msk) || defined(__NRFX_DOXYGEN__)
537 /**
538 * @brief Function for enabling one-shot operation for the specified capture/compare channel.
539 *
540 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
541 * @param[in] cc_channel Capture/compare channel.
542 */
543 NRF_STATIC_INLINE void nrf_timer_one_shot_enable(NRF_TIMER_Type * p_reg,
544 nrf_timer_cc_channel_t cc_channel);
545
546 /**
547 * @brief Function for disabling one-shot operation for the specified capture/compare channel.
548 *
549 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
550 * @param[in] cc_channel Capture/compare channel.
551 */
552 NRF_STATIC_INLINE void nrf_timer_one_shot_disable(NRF_TIMER_Type * p_reg,
553 nrf_timer_cc_channel_t cc_channel);
554
555 #endif // defined(TIMER_ONESHOTEN_ONESHOTEN_Msk) || defined(__NRFX_DOXYGEN__)
556
557 #ifndef NRF_DECLARE_ONLY
558
nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,nrf_timer_task_t task)559 NRF_STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,
560 nrf_timer_task_t task)
561 {
562 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
563 }
564
nrf_timer_task_address_get(NRF_TIMER_Type const * p_reg,nrf_timer_task_t task)565 NRF_STATIC_INLINE uint32_t nrf_timer_task_address_get(NRF_TIMER_Type const * p_reg,
566 nrf_timer_task_t task)
567 {
568 return (uint32_t)((uint8_t *)p_reg + (uint32_t)task);
569 }
570
nrf_timer_event_clear(NRF_TIMER_Type * p_reg,nrf_timer_event_t event)571 NRF_STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
572 nrf_timer_event_t event)
573 {
574 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
575 nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);
576 }
577
nrf_timer_event_check(NRF_TIMER_Type const * p_reg,nrf_timer_event_t event)578 NRF_STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type const * p_reg,
579 nrf_timer_event_t event)
580 {
581 return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
582 }
583
nrf_timer_event_address_get(NRF_TIMER_Type const * p_reg,nrf_timer_event_t event)584 NRF_STATIC_INLINE uint32_t nrf_timer_event_address_get(NRF_TIMER_Type const * p_reg,
585 nrf_timer_event_t event)
586 {
587 return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
588 }
589
nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,uint32_t mask)590 NRF_STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
591 uint32_t mask)
592 {
593 p_reg->SHORTS |= mask;
594 }
595
nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,uint32_t mask)596 NRF_STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
597 uint32_t mask)
598 {
599 p_reg->SHORTS &= ~(mask);
600 }
601
nrf_timer_shorts_set(NRF_TIMER_Type * p_reg,uint32_t mask)602 NRF_STATIC_INLINE void nrf_timer_shorts_set(NRF_TIMER_Type * p_reg,
603 uint32_t mask)
604 {
605 p_reg->SHORTS = mask;
606 }
607
nrf_timer_int_enable(NRF_TIMER_Type * p_reg,uint32_t mask)608 NRF_STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
609 uint32_t mask)
610 {
611 p_reg->INTENSET = mask;
612 }
613
nrf_timer_int_disable(NRF_TIMER_Type * p_reg,uint32_t mask)614 NRF_STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
615 uint32_t mask)
616 {
617 p_reg->INTENCLR = mask;
618 }
619
nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg,uint32_t mask)620 NRF_STATIC_INLINE uint32_t nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg, uint32_t mask)
621 {
622 return p_reg->INTENSET & mask;
623 }
624
625 #if defined(DPPI_PRESENT)
nrf_timer_subscribe_set(NRF_TIMER_Type * p_reg,nrf_timer_task_t task,uint8_t channel)626 NRF_STATIC_INLINE void nrf_timer_subscribe_set(NRF_TIMER_Type * p_reg,
627 nrf_timer_task_t task,
628 uint8_t channel)
629 {
630 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
631 ((uint32_t)channel | TIMER_SUBSCRIBE_START_EN_Msk);
632 }
633
nrf_timer_subscribe_clear(NRF_TIMER_Type * p_reg,nrf_timer_task_t task)634 NRF_STATIC_INLINE void nrf_timer_subscribe_clear(NRF_TIMER_Type * p_reg,
635 nrf_timer_task_t task)
636 {
637 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
638 }
639
nrf_timer_publish_set(NRF_TIMER_Type * p_reg,nrf_timer_event_t event,uint8_t channel)640 NRF_STATIC_INLINE void nrf_timer_publish_set(NRF_TIMER_Type * p_reg,
641 nrf_timer_event_t event,
642 uint8_t channel)
643 {
644 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
645 ((uint32_t)channel | TIMER_PUBLISH_COMPARE_EN_Msk);
646 }
647
nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,nrf_timer_event_t event)648 NRF_STATIC_INLINE void nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,
649 nrf_timer_event_t event)
650 {
651 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
652 }
653 #endif // defined(DPPI_PRESENT)
654
nrf_timer_mode_set(NRF_TIMER_Type * p_reg,nrf_timer_mode_t mode)655 NRF_STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg,
656 nrf_timer_mode_t mode)
657 {
658 p_reg->MODE = (p_reg->MODE & ~TIMER_MODE_MODE_Msk) |
659 ((mode << TIMER_MODE_MODE_Pos) & TIMER_MODE_MODE_Msk);
660 }
661
nrf_timer_mode_get(NRF_TIMER_Type const * p_reg)662 NRF_STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type const * p_reg)
663 {
664 return (nrf_timer_mode_t)(p_reg->MODE);
665 }
666
nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,nrf_timer_bit_width_t bit_width)667 NRF_STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
668 nrf_timer_bit_width_t bit_width)
669 {
670 p_reg->BITMODE = (p_reg->BITMODE & ~TIMER_BITMODE_BITMODE_Msk) |
671 ((bit_width << TIMER_BITMODE_BITMODE_Pos) &
672 TIMER_BITMODE_BITMODE_Msk);
673 }
674
nrf_timer_bit_width_get(NRF_TIMER_Type const * p_reg)675 NRF_STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type const * p_reg)
676 {
677 return (nrf_timer_bit_width_t)(p_reg->BITMODE);
678 }
679
nrf_timer_frequency_set(NRF_TIMER_Type * p_reg,nrf_timer_frequency_t frequency)680 NRF_STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_reg,
681 nrf_timer_frequency_t frequency)
682 {
683 p_reg->PRESCALER = (p_reg->PRESCALER & ~TIMER_PRESCALER_PRESCALER_Msk) |
684 ((frequency << TIMER_PRESCALER_PRESCALER_Pos) &
685 TIMER_PRESCALER_PRESCALER_Msk);
686 }
687
nrf_timer_frequency_get(NRF_TIMER_Type const * p_reg)688 NRF_STATIC_INLINE nrf_timer_frequency_t nrf_timer_frequency_get(NRF_TIMER_Type const * p_reg)
689 {
690 return (nrf_timer_frequency_t)(p_reg->PRESCALER);
691 }
692
nrf_timer_cc_set(NRF_TIMER_Type * p_reg,nrf_timer_cc_channel_t cc_channel,uint32_t cc_value)693 NRF_STATIC_INLINE void nrf_timer_cc_set(NRF_TIMER_Type * p_reg,
694 nrf_timer_cc_channel_t cc_channel,
695 uint32_t cc_value)
696 {
697 p_reg->CC[cc_channel] = cc_value;
698 }
699
nrf_timer_cc_get(NRF_TIMER_Type const * p_reg,nrf_timer_cc_channel_t cc_channel)700 NRF_STATIC_INLINE uint32_t nrf_timer_cc_get(NRF_TIMER_Type const * p_reg,
701 nrf_timer_cc_channel_t cc_channel)
702 {
703 return (uint32_t)p_reg->CC[cc_channel];
704 }
705
nrf_timer_capture_task_get(uint32_t channel)706 NRF_STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint32_t channel)
707 {
708 return (nrf_timer_task_t)NRFX_OFFSETOF(NRF_TIMER_Type, TASKS_CAPTURE[channel]);
709 }
710
nrf_timer_compare_event_get(uint32_t channel)711 NRF_STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint32_t channel)
712 {
713 return (nrf_timer_event_t)NRFX_OFFSETOF(NRF_TIMER_Type, EVENTS_COMPARE[channel]);
714 }
715
nrf_timer_compare_int_get(uint32_t channel)716 NRF_STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint32_t channel)
717 {
718 return (nrf_timer_int_mask_t)
719 ((uint32_t)NRF_TIMER_INT_COMPARE0_MASK << channel);
720 }
721
nrf_timer_us_to_ticks(uint32_t time_us,nrf_timer_frequency_t frequency)722 NRF_STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us,
723 nrf_timer_frequency_t frequency)
724 {
725 // The "frequency" parameter here is actually the prescaler value, and the
726 // timer runs at the following frequency: f = 16 MHz / 2^prescaler.
727 uint32_t prescaler = (uint32_t)frequency;
728 uint64_t ticks = ((time_us * 16ULL) >> prescaler);
729 NRFX_ASSERT(ticks <= UINT32_MAX);
730 return (uint32_t)ticks;
731 }
732
nrf_timer_ms_to_ticks(uint32_t time_ms,nrf_timer_frequency_t frequency)733 NRF_STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
734 nrf_timer_frequency_t frequency)
735 {
736 // The "frequency" parameter here is actually the prescaler value, and the
737 // timer runs at the following frequency: f = 16000 kHz / 2^prescaler.
738 uint32_t prescaler = (uint32_t)frequency;
739 uint64_t ticks = ((time_ms * 16000ULL) >> prescaler);
740 NRFX_ASSERT(ticks <= UINT32_MAX);
741 return (uint32_t)ticks;
742 }
743
744 #if defined(TIMER_ONESHOTEN_ONESHOTEN_Msk)
nrf_timer_one_shot_enable(NRF_TIMER_Type * p_reg,nrf_timer_cc_channel_t cc_channel)745 NRF_STATIC_INLINE void nrf_timer_one_shot_enable(NRF_TIMER_Type * p_reg,
746 nrf_timer_cc_channel_t cc_channel)
747 {
748 p_reg->ONESHOTEN[cc_channel] = TIMER_ONESHOTEN_ONESHOTEN_Msk;
749 }
750
nrf_timer_one_shot_disable(NRF_TIMER_Type * p_reg,nrf_timer_cc_channel_t cc_channel)751 NRF_STATIC_INLINE void nrf_timer_one_shot_disable(NRF_TIMER_Type * p_reg,
752 nrf_timer_cc_channel_t cc_channel)
753 {
754 p_reg->ONESHOTEN[cc_channel] = 0;
755 }
756 #endif // defined(TIMER_ONESHOTEN_ONESHOTEN_Msk)
757
758 #endif // NRF_DECLARE_ONLY
759
760 /** @} */
761
762 #ifdef __cplusplus
763 }
764 #endif
765
766 #endif // NRF_TIMER_H__
767