1 /*
2 * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #ifndef _HARDWARE_UART_H
8 #define _HARDWARE_UART_H
9
10 #include "pico.h"
11 #include "hardware/structs/uart.h"
12 #include "hardware/regs/dreq.h"
13
14 // PICO_CONFIG: PARAM_ASSERTIONS_ENABLED_UART, Enable/disable assertions in the UART module, type=bool, default=0, group=hardware_uart
15 #ifndef PARAM_ASSERTIONS_ENABLED_UART
16 #define PARAM_ASSERTIONS_ENABLED_UART 0
17 #endif
18
19 #ifdef __cplusplus
20 extern "C" {
21 #endif
22
23 // PICO_CONFIG: PICO_UART_ENABLE_CRLF_SUPPORT, Enable/disable CR/LF translation support, type=bool, default=1, group=hardware_uart
24 #ifndef PICO_UART_ENABLE_CRLF_SUPPORT
25 #define PICO_UART_ENABLE_CRLF_SUPPORT 1
26 #endif
27
28 // PICO_CONFIG: PICO_UART_DEFAULT_CRLF, Enable/disable CR/LF translation on UART, type=bool, default=0, depends=PICO_UART_ENABLE_CRLF_SUPPORT, group=hardware_uart
29 #ifndef PICO_UART_DEFAULT_CRLF
30 #define PICO_UART_DEFAULT_CRLF 0
31 #endif
32
33 // PICO_CONFIG: PICO_DEFAULT_UART, Define the default UART used for printf etc, min=0, max=1, group=hardware_uart
34 // PICO_CONFIG: PICO_DEFAULT_UART_TX_PIN, Define the default UART TX pin, min=0, max=29, group=hardware_uart
35 // PICO_CONFIG: PICO_DEFAULT_UART_RX_PIN, Define the default UART RX pin, min=0, max=29, group=hardware_uart
36
37 // PICO_CONFIG: PICO_DEFAULT_UART_BAUD_RATE, Define the default UART baudrate, max=921600, default=115200, group=hardware_uart
38 #ifndef PICO_DEFAULT_UART_BAUD_RATE
39 #define PICO_DEFAULT_UART_BAUD_RATE 115200 ///< Default baud rate
40 #endif
41
42 /** \file hardware/uart.h
43 * \defgroup hardware_uart hardware_uart
44 *
45 * Hardware UART API
46 *
47 * RP2040 has 2 identical instances of a UART peripheral, based on the ARM PL011. Each UART can be connected to a number
48 * of GPIO pins as defined in the GPIO muxing.
49 *
50 * Only the TX, RX, RTS, and CTS signals are
51 * connected, meaning that the modem mode and IrDA mode of the PL011 are not supported.
52 *
53 * \subsection uart_example Example
54 * \addtogroup hardware_uart
55 *
56 * \code
57 * int main() {
58 *
59 * // Initialise UART 0
60 * uart_init(uart0, 115200);
61 *
62 * // Set the GPIO pin mux to the UART - 0 is TX, 1 is RX
63 * gpio_set_function(0, GPIO_FUNC_UART);
64 * gpio_set_function(1, GPIO_FUNC_UART);
65 *
66 * uart_puts(uart0, "Hello world!");
67 * }
68 * \endcode
69 */
70
71 // Currently always a pointer to hw but it might not be in the future
72 typedef struct uart_inst uart_inst_t;
73
74 /** The UART identifiers for use in UART functions.
75 *
76 * e.g. uart_init(uart1, 48000)
77 *
78 * \ingroup hardware_uart
79 * @{
80 */
81 #define uart0 ((uart_inst_t *)uart0_hw) ///< Identifier for UART instance 0
82 #define uart1 ((uart_inst_t *)uart1_hw) ///< Identifier for UART instance 1
83
84 /** @} */
85
86 #if !defined(PICO_DEFAULT_UART_INSTANCE) && defined(PICO_DEFAULT_UART)
87 #define PICO_DEFAULT_UART_INSTANCE (__CONCAT(uart,PICO_DEFAULT_UART))
88 #endif
89
90 #ifdef PICO_DEFAULT_UART_INSTANCE
91 #define uart_default PICO_DEFAULT_UART_INSTANCE
92 #endif
93
94 /*! \brief Convert UART instance to hardware instance number
95 * \ingroup hardware_uart
96 *
97 * \param uart UART instance
98 * \return Number of UART, 0 or 1.
99 */
uart_get_index(uart_inst_t * uart)100 static inline uint uart_get_index(uart_inst_t *uart) {
101 invalid_params_if(UART, uart != uart0 && uart != uart1);
102 return uart == uart1 ? 1 : 0;
103 }
104
uart_get_instance(uint instance)105 static inline uart_inst_t *uart_get_instance(uint instance) {
106 static_assert(NUM_UARTS == 2, "");
107 invalid_params_if(UART, instance >= NUM_UARTS);
108 return instance ? uart1 : uart0;
109 }
110
uart_get_hw(uart_inst_t * uart)111 static inline uart_hw_t *uart_get_hw(uart_inst_t *uart) {
112 uart_get_index(uart); // check it is a hw uart
113 return (uart_hw_t *)uart;
114 }
115
116 /** \brief UART Parity enumeration
117 * \ingroup hardware_uart
118 */
119 typedef enum {
120 UART_PARITY_NONE,
121 UART_PARITY_EVEN,
122 UART_PARITY_ODD
123 } uart_parity_t;
124
125 // ----------------------------------------------------------------------------
126 // Setup
127
128 /*! \brief Initialise a UART
129 * \ingroup hardware_uart
130 *
131 * Put the UART into a known state, and enable it. Must be called before other
132 * functions.
133 *
134 * This function always enables the FIFOs, and configures the UART for the
135 * following default line format:
136 *
137 * - 8 data bits
138 * - No parity bit
139 * - One stop bit
140 *
141 * \note There is no guarantee that the baudrate requested will be possible, the nearest will be chosen,
142 * and this function will return the configured baud rate.
143 *
144 * \param uart UART instance. \ref uart0 or \ref uart1
145 * \param baudrate Baudrate of UART in Hz
146 * \return Actual set baudrate
147 */
148 uint uart_init(uart_inst_t *uart, uint baudrate);
149
150 /*! \brief DeInitialise a UART
151 * \ingroup hardware_uart
152 *
153 * Disable the UART if it is no longer used. Must be reinitialised before
154 * being used again.
155 *
156 * \param uart UART instance. \ref uart0 or \ref uart1
157 */
158 void uart_deinit(uart_inst_t *uart);
159
160 /*! \brief Set UART baud rate
161 * \ingroup hardware_uart
162 *
163 * Set baud rate as close as possible to requested, and return actual rate selected.
164 *
165 * The UART is paused for around two character periods whilst the settings are
166 * changed. Data received during this time may be dropped by the UART.
167 *
168 * Any characters still in the transmit buffer will be sent using the new
169 * updated baud rate. uart_tx_wait_blocking() can be called before this
170 * function to ensure all characters at the old baud rate have been sent
171 * before the rate is changed.
172 *
173 * This function should not be called from an interrupt context, and the UART
174 * interrupt should be disabled before calling this function.
175 *
176 * \param uart UART instance. \ref uart0 or \ref uart1
177 * \param baudrate Baudrate in Hz
178 * \return Actual set baudrate
179 */
180 uint uart_set_baudrate(uart_inst_t *uart, uint baudrate);
181
182 /*! \brief Set UART flow control CTS/RTS
183 * \ingroup hardware_uart
184 *
185 * \param uart UART instance. \ref uart0 or \ref uart1
186 * \param cts If true enable flow control of TX by clear-to-send input
187 * \param rts If true enable assertion of request-to-send output by RX flow control
188 */
uart_set_hw_flow(uart_inst_t * uart,bool cts,bool rts)189 static inline void uart_set_hw_flow(uart_inst_t *uart, bool cts, bool rts) {
190 hw_write_masked(&uart_get_hw(uart)->cr,
191 (bool_to_bit(cts) << UART_UARTCR_CTSEN_LSB) | (bool_to_bit(rts) << UART_UARTCR_RTSEN_LSB),
192 UART_UARTCR_RTSEN_BITS | UART_UARTCR_CTSEN_BITS);
193 }
194
195 /*! \brief Set UART data format
196 * \ingroup hardware_uart
197 *
198 * Configure the data format (bits etc) for the UART.
199 *
200 * The UART is paused for around two character periods whilst the settings are
201 * changed. Data received during this time may be dropped by the UART.
202 *
203 * Any characters still in the transmit buffer will be sent using the new
204 * updated data format. uart_tx_wait_blocking() can be called before this
205 * function to ensure all characters needing the old format have been sent
206 * before the format is changed.
207 *
208 * This function should not be called from an interrupt context, and the UART
209 * interrupt should be disabled before calling this function.
210 *
211 * \param uart UART instance. \ref uart0 or \ref uart1
212 * \param data_bits Number of bits of data. 5..8
213 * \param stop_bits Number of stop bits 1..2
214 * \param parity Parity option.
215 */
216 void uart_set_format(uart_inst_t *uart, uint data_bits, uint stop_bits, uart_parity_t parity);
217
218 /*! \brief Setup UART interrupts
219 * \ingroup hardware_uart
220 *
221 * Enable the UART's interrupt output. An interrupt handler will need to be installed prior to calling
222 * this function.
223 *
224 * \param uart UART instance. \ref uart0 or \ref uart1
225 * \param rx_has_data If true an interrupt will be fired when the RX FIFO contains data.
226 * \param tx_needs_data If true an interrupt will be fired when the TX FIFO needs data.
227 */
uart_set_irq_enables(uart_inst_t * uart,bool rx_has_data,bool tx_needs_data)228 static inline void uart_set_irq_enables(uart_inst_t *uart, bool rx_has_data, bool tx_needs_data) {
229 // Both UARTRXINTR (RX) and UARTRTINTR (RX timeout) interrupts are
230 // required for rx_has_data. RX asserts when >=4 characters are in the RX
231 // FIFO (for RXIFLSEL=0). RT asserts when there are >=1 characters and no
232 // more have been received for 32 bit periods.
233 uart_get_hw(uart)->imsc = (bool_to_bit(tx_needs_data) << UART_UARTIMSC_TXIM_LSB) |
234 (bool_to_bit(rx_has_data) << UART_UARTIMSC_RXIM_LSB) |
235 (bool_to_bit(rx_has_data) << UART_UARTIMSC_RTIM_LSB);
236 if (rx_has_data) {
237 // Set minimum threshold
238 hw_write_masked(&uart_get_hw(uart)->ifls, 0 << UART_UARTIFLS_RXIFLSEL_LSB,
239 UART_UARTIFLS_RXIFLSEL_BITS);
240 }
241 if (tx_needs_data) {
242 // Set maximum threshold
243 hw_write_masked(&uart_get_hw(uart)->ifls, 0 << UART_UARTIFLS_TXIFLSEL_LSB,
244 UART_UARTIFLS_TXIFLSEL_BITS);
245 }
246 }
247
248 /*! \brief Test if specific UART is enabled
249 * \ingroup hardware_uart
250 *
251 * \param uart UART instance. \ref uart0 or \ref uart1
252 * \return true if the UART is enabled
253 */
uart_is_enabled(uart_inst_t * uart)254 static inline bool uart_is_enabled(uart_inst_t *uart) {
255 return !!(uart_get_hw(uart)->cr & UART_UARTCR_UARTEN_BITS);
256 }
257
258 /*! \brief Enable/Disable the FIFOs on specified UART
259 * \ingroup hardware_uart
260 *
261 * The UART is paused for around two character periods whilst the settings are
262 * changed. Data received during this time may be dropped by the UART.
263 *
264 * Any characters still in the transmit FIFO will be lost if the FIFO is
265 * disabled. uart_tx_wait_blocking() can be called before this
266 * function to avoid this.
267 *
268 * This function should not be called from an interrupt context, and the UART
269 * interrupt should be disabled when calling this function.
270 *
271 * \param uart UART instance. \ref uart0 or \ref uart1
272 * \param enabled true to enable FIFO (default), false to disable
273 */
274 void uart_set_fifo_enabled(uart_inst_t *uart, bool enabled);
275
276 // ----------------------------------------------------------------------------
277 // Generic input/output
278
279 /*! \brief Determine if space is available in the TX FIFO
280 * \ingroup hardware_uart
281 *
282 * \param uart UART instance. \ref uart0 or \ref uart1
283 * \return false if no space available, true otherwise
284 */
uart_is_writable(uart_inst_t * uart)285 static inline bool uart_is_writable(uart_inst_t *uart) {
286 return !(uart_get_hw(uart)->fr & UART_UARTFR_TXFF_BITS);
287 }
288
289 /*! \brief Wait for the UART TX fifo to be drained
290 * \ingroup hardware_uart
291 *
292 * \param uart UART instance. \ref uart0 or \ref uart1
293 */
uart_tx_wait_blocking(uart_inst_t * uart)294 static inline void uart_tx_wait_blocking(uart_inst_t *uart) {
295 while (uart_get_hw(uart)->fr & UART_UARTFR_BUSY_BITS) tight_loop_contents();
296 }
297
298 /*! \brief Determine whether data is waiting in the RX FIFO
299 * \ingroup hardware_uart
300 *
301 * \param uart UART instance. \ref uart0 or \ref uart1
302 * \return true if the RX FIFO is not empty, otherwise false.
303 *
304 */
uart_is_readable(uart_inst_t * uart)305 static inline bool uart_is_readable(uart_inst_t *uart) {
306 // PL011 doesn't expose levels directly, so return values are only 0 or 1
307 return !(uart_get_hw(uart)->fr & UART_UARTFR_RXFE_BITS);
308 }
309
310 /*! \brief Write to the UART for transmission.
311 * \ingroup hardware_uart
312 *
313 * This function will block until all the data has been sent to the UART
314 *
315 * \param uart UART instance. \ref uart0 or \ref uart1
316 * \param src The bytes to send
317 * \param len The number of bytes to send
318 */
uart_write_blocking(uart_inst_t * uart,const uint8_t * src,size_t len)319 static inline void uart_write_blocking(uart_inst_t *uart, const uint8_t *src, size_t len) {
320 for (size_t i = 0; i < len; ++i) {
321 while (!uart_is_writable(uart))
322 tight_loop_contents();
323 uart_get_hw(uart)->dr = *src++;
324 }
325 }
326
327 /*! \brief Read from the UART
328 * \ingroup hardware_uart
329 *
330 * This function blocks until len characters have been read from the UART
331 *
332 * \param uart UART instance. \ref uart0 or \ref uart1
333 * \param dst Buffer to accept received bytes
334 * \param len The number of bytes to receive.
335 */
uart_read_blocking(uart_inst_t * uart,uint8_t * dst,size_t len)336 static inline void uart_read_blocking(uart_inst_t *uart, uint8_t *dst, size_t len) {
337 for (size_t i = 0; i < len; ++i) {
338 while (!uart_is_readable(uart))
339 tight_loop_contents();
340 *dst++ = (uint8_t) uart_get_hw(uart)->dr;
341 }
342 }
343
344 // ----------------------------------------------------------------------------
345 // UART-specific operations and aliases
346
347 /*! \brief Write single character to UART for transmission.
348 * \ingroup hardware_uart
349 *
350 * This function will block until the entire character has been sent
351 *
352 * \param uart UART instance. \ref uart0 or \ref uart1
353 * \param c The character to send
354 */
uart_putc_raw(uart_inst_t * uart,char c)355 static inline void uart_putc_raw(uart_inst_t *uart, char c) {
356 uart_write_blocking(uart, (const uint8_t *) &c, 1);
357 }
358
359 /*! \brief Write single character to UART for transmission, with optional CR/LF conversions
360 * \ingroup hardware_uart
361 *
362 * This function will block until the character has been sent
363 *
364 * \param uart UART instance. \ref uart0 or \ref uart1
365 * \param c The character to send
366 */
uart_putc(uart_inst_t * uart,char c)367 static inline void uart_putc(uart_inst_t *uart, char c) {
368 #if PICO_UART_ENABLE_CRLF_SUPPORT
369 extern short uart_char_to_line_feed[NUM_UARTS];
370 if (uart_char_to_line_feed[uart_get_index(uart)] == c)
371 uart_putc_raw(uart, '\r');
372 #endif
373 uart_putc_raw(uart, c);
374 }
375
376 /*! \brief Write string to UART for transmission, doing any CR/LF conversions
377 * \ingroup hardware_uart
378 *
379 * This function will block until the entire string has been sent
380 *
381 * \param uart UART instance. \ref uart0 or \ref uart1
382 * \param s The null terminated string to send
383 */
uart_puts(uart_inst_t * uart,const char * s)384 static inline void uart_puts(uart_inst_t *uart, const char *s) {
385 #if PICO_UART_ENABLE_CRLF_SUPPORT
386 bool last_was_cr = false;
387 while (*s) {
388 // Don't add extra carriage returns if one is present
389 if (last_was_cr)
390 uart_putc_raw(uart, *s);
391 else
392 uart_putc(uart, *s);
393 last_was_cr = *s++ == '\r';
394 }
395 #else
396 while (*s)
397 uart_putc(uart, *s++);
398 #endif
399 }
400
401 /*! \brief Read a single character from the UART
402 * \ingroup hardware_uart
403 *
404 * This function will block until a character has been read
405 *
406 * \param uart UART instance. \ref uart0 or \ref uart1
407 * \return The character read.
408 */
uart_getc(uart_inst_t * uart)409 static inline char uart_getc(uart_inst_t *uart) {
410 char c;
411 uart_read_blocking(uart, (uint8_t *) &c, 1);
412 return c;
413 }
414
415 /*! \brief Assert a break condition on the UART transmission.
416 * \ingroup hardware_uart
417 *
418 * \param uart UART instance. \ref uart0 or \ref uart1
419 * \param en Assert break condition (TX held low) if true. Clear break condition if false.
420 */
421 void uart_set_break(uart_inst_t *uart, bool en);
422
423 /*! \brief Set CR/LF conversion on UART
424 * \ingroup hardware_uart
425 *
426 * \param uart UART instance. \ref uart0 or \ref uart1
427 * \param translate If true, convert line feeds to carriage return on transmissions
428 */
429 void uart_set_translate_crlf(uart_inst_t *uart, bool translate);
430
431 /*! \brief Wait for the default UART's TX FIFO to be drained
432 * \ingroup hardware_uart
433 */
uart_default_tx_wait_blocking(void)434 static inline void uart_default_tx_wait_blocking(void) {
435 #ifdef uart_default
436 uart_tx_wait_blocking(uart_default);
437 #else
438 assert(false);
439 #endif
440 }
441
442 /*! \brief Wait for up to a certain number of microseconds for the RX FIFO to be non empty
443 * \ingroup hardware_uart
444 *
445 * \param uart UART instance. \ref uart0 or \ref uart1
446 * \param us the number of microseconds to wait at most (may be 0 for an instantaneous check)
447 * \return true if the RX FIFO became non empty before the timeout, false otherwise
448 */
449 bool uart_is_readable_within_us(uart_inst_t *uart, uint32_t us);
450
451 /*! \brief Return the DREQ to use for pacing transfers to/from a particular UART instance
452 * \ingroup hardware_uart
453 *
454 * \param uart UART instance. \ref uart0 or \ref uart1
455 * \param is_tx true for sending data to the UART instance, false for receiving data from the UART instance
456 */
uart_get_dreq(uart_inst_t * uart,bool is_tx)457 static inline uint uart_get_dreq(uart_inst_t *uart, bool is_tx) {
458 static_assert(DREQ_UART0_RX == DREQ_UART0_TX + 1, "");
459 static_assert(DREQ_UART1_RX == DREQ_UART1_TX + 1, "");
460 static_assert(DREQ_UART1_TX == DREQ_UART0_TX + 2, "");
461 return DREQ_UART0_TX + uart_get_index(uart) * 2 + !is_tx;
462 }
463
464 #ifdef __cplusplus
465 }
466 #endif
467
468 #endif
469