1 // THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT 2 3 /* 4 * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 9 #ifndef _HARDWARE_STRUCTS_XOSC_H 10 #define _HARDWARE_STRUCTS_XOSC_H 11 12 #include "hardware/address_mapped.h" 13 #include "hardware/regs/xosc.h" 14 15 // Reference to datasheet: https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf#tab-registerlist_xosc 16 // 17 // The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature) 18 // _REG_(x) will link to the corresponding register in hardware/regs/xosc.h. 19 // 20 // Bit-field descriptions are of the form: 21 // BITMASK [BITRANGE]: FIELDNAME (RESETVALUE): DESCRIPTION 22 23 /// \tag::xosc_hw[] 24 typedef struct { 25 _REG_(XOSC_CTRL_OFFSET) // XOSC_CTRL 26 // Crystal Oscillator Control 27 // 0x00fff000 [23:12] : ENABLE (0): On power-up this field is initialised to DISABLE and the chip runs from the ROSC 28 // 0x00000fff [11:0] : FREQ_RANGE (0): Frequency range 29 io_rw_32 ctrl; 30 31 _REG_(XOSC_STATUS_OFFSET) // XOSC_STATUS 32 // Crystal Oscillator Status 33 // 0x80000000 [31] : STABLE (0): Oscillator is running and stable 34 // 0x01000000 [24] : BADWRITE (0): An invalid value has been written to CTRL_ENABLE or CTRL_FREQ_RANGE or DORMANT 35 // 0x00001000 [12] : ENABLED (0): Oscillator is enabled but not necessarily running and stable, resets to 0 36 // 0x00000003 [1:0] : FREQ_RANGE (0): The current frequency range setting, always reads 0 37 io_rw_32 status; 38 39 _REG_(XOSC_DORMANT_OFFSET) // XOSC_DORMANT 40 // Crystal Oscillator pause control 41 io_rw_32 dormant; 42 43 _REG_(XOSC_STARTUP_OFFSET) // XOSC_STARTUP 44 // Controls the startup delay 45 // 0x00100000 [20] : X4 (0): Multiplies the startup_delay by 4 46 // 0x00003fff [13:0] : DELAY (0xc4): in multiples of 256*xtal_period 47 io_rw_32 startup; 48 49 uint32_t _pad0[3]; 50 51 _REG_(XOSC_COUNT_OFFSET) // XOSC_COUNT 52 // A down counter running at the xosc frequency which counts to zero and stops 53 // 0x000000ff [7:0] : COUNT (0) 54 io_rw_32 count; 55 } xosc_hw_t; 56 57 #define xosc_hw ((xosc_hw_t *)XOSC_BASE) 58 /// \end::xosc_hw[] 59 60 #endif 61