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Searched refs:RISCV_CSR_XIE_TIE (Results 1 – 3 of 3) sorted by relevance

/arch/riscv/
A Dtime.c31 riscv_csr_clear(RISCV_CSR_XIE, RISCV_CSR_XIE_TIE); in platform_set_oneshot_timer()
37 riscv_csr_set(RISCV_CSR_XIE, RISCV_CSR_XIE_TIE); in platform_set_oneshot_timer()
73 riscv_csr_clear(RISCV_CSR_XIE, RISCV_CSR_XIE_TIE); in platform_stop_timer()
79 riscv_csr_clear(RISCV_CSR_XIE, RISCV_CSR_XIE_TIE); in riscv_timer_exception()
A Darch.c57 riscv_csr_clear(RISCV_CSR_XIE, RISCV_CSR_XIE_SIE | RISCV_CSR_XIE_TIE | RISCV_CSR_XIE_EIE); in riscv_early_init_percpu()
/arch/riscv/include/arch/
A Driscv.h97 #define RISCV_CSR_XIE_TIE (1ul << (RISCV_XMODE_OFFSET + 4)) macro

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