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Searched refs:RISCV_CSR_XSTATUS_FS_INITIAL (Results 1 – 3 of 3) sorted by relevance

/arch/riscv/
A Dthread.c83 case RISCV_CSR_XSTATUS_FS_INITIAL: in arch_context_switch()
112 riscv_csr_set(RISCV_CSR_XSTATUS, RISCV_CSR_XSTATUS_FS_INITIAL); in arch_context_switch()
A Darch.c62 riscv_csr_set(RISCV_CSR_XSTATUS, RISCV_CSR_XSTATUS_FS_INITIAL); in riscv_early_init_percpu()
170 status |= RISCV_CSR_XSTATUS_FS_INITIAL; // mark fpu state 'initial' in arch_enter_uspace()
/arch/riscv/include/arch/
A Driscv.h85 #define RISCV_CSR_XSTATUS_FS_INITIAL (1ul << RISCV_CSR_XSTATUS_FS_SHIFT) macro

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