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Searched refs:a0 (Results 1 – 13 of 13) sorted by relevance

/arch/riscv/
A Dfpu_asm.S84 fsd f0, 0*8(a0)
85 fsd f1, 1*8(a0)
86 fsd f2, 2*8(a0)
87 fsd f3, 3*8(a0)
88 fsd f4, 4*8(a0)
89 fsd f5, 5*8(a0)
90 fsd f6, 6*8(a0)
91 fsd f7, 7*8(a0)
92 fsd f8, 8*8(a0)
93 fsd f9, 9*8(a0)
[all …]
A Dasm.S17 # a0 = oldcs
19 STR ra, REGOFF(0)(a0)
20 STR sp, REGOFF(1)(a0)
21 STR s0, REGOFF(2)(a0)
22 STR s1, REGOFF(3)(a0)
23 STR s2, REGOFF(4)(a0)
24 STR s3, REGOFF(5)(a0)
25 STR s4, REGOFF(6)(a0)
26 STR s5, REGOFF(7)(a0)
27 STR s6, REGOFF(8)(a0)
[all …]
A Dsbi.c43 register unsigned long a0 asm("a0") = (unsigned long)arg0; \
52 : "+r" (a0), "+r" (a1) \
55 (struct sbiret){ .error = a0, .value = a1 }; \
A Dstart.S25 csrr a0, mhartid
99 mv s0, a0
104 mv a0, s0
A Dexceptions.c77 printf("a0 %#16lx a1 %#16lx a2 %#16lx a3 %#16lx\n", frame->a0, frame->a1, frame->a2, frame->a3); in dump_iframe()
/arch/mips/
A Dasm.S14 # a0 = oldcs
18 sw $s0, 0($a0)
19 sw $s1, 4($a0)
20 sw $s2, 8($a0)
21 sw $s3, 12($a0)
22 sw $s4, 16($a0)
23 sw $s5, 20($a0)
24 sw $s6, 24($a0)
25 sw $s7, 28($a0)
26 sw $s8, 32($a0)
[all …]
A Dvectors.S26 sw $a0, 12($sp)
62 lw $a0, 12($sp)
123 move $a0, $sp
A Dstart.S24 li $a0, 1
/arch/m68k/
A Dstart.S20 lea %pc@(_start),%a0 // load the current address using PC relative addressing mode
22 cmpal %a0,%a1
31 movel %a0@+,%a1@+
36 movl #bss_clear,%a0
37 jmp %a0@
42 lea __bss_start,%a0
44 cmpl %a0,%a1
48 clrl %a0@+
49 cmpal %a1,%a0
A Dasm.S13 movel %sp@,%a0 // oldcs
17 movel %sp, %a0@(0) // oldcs.sp
18 movel %d0, %a0@(4) // oldcs.pc
19 moveml %d2-%d7/%a2-%a6, %a0@(8) // oldcs.<base of callee saved list>
A Dexceptions_asm.S20 moveml %d0-%d7/%a0-%a6, %sp@-
26 moveml %sp@+, %d0-%d7/%a0-%a6
32 moveml %d0-%d7/%a0-%a6, %sp@-
38 moveml %sp@+, %d0-%d7/%a0-%a6
/arch/riscv/include/arch/riscv/
A Diframe.h33 unsigned long a0; member
61 static_assert(offsetof(struct riscv_short_iframe, a0) == RISCV_IFRAME_A_BASE, "");
/arch/mips/include/arch/
A Dmips.h63 uint32_t a0; member

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