| /arch/x86/ |
| A D | feature.c | 107 uint32_t a, b, c, d; in x86_cpu_detect() local
110 cpuid(X86_CPUID_BASE, &a, &b, &c, &d); in x86_cpu_detect()
113 LTRACEF("cpuid leaf 0: %#x %#x %#x %#x\n", a, b, c, d); in x86_cpu_detect()
120 vs.reg[0] = b; in x86_cpu_detect()
129 cpuid(X86_CPUID_EXT_BASE, &a, &b, &c, &d); in x86_cpu_detect()
135 cpuid(X86_CPUID_HYP_BASE, &a, &b, &c, &d); in x86_cpu_detect()
150 uint32_t a, b, c, d; in x86_cpu_detect() local
151 cpuid(X86_CPUID_MODEL_FEATURES, &a, &b, &c, &d); in x86_cpu_detect()
246 uint32_t a, b, c, d; in x86_feature_init() local
247 cpuid(X86_CPUID_BASE, &a, &b, &c, &d); in x86_feature_init()
[all …]
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| A D | fpu.c | 158 LTRACEF("xsave leaf 0: %#x %#x %#x %#x\n", leaf.a, leaf.b, leaf.c, leaf.d); in x86_fpu_early_init()
161 LTRACEF("xsave leaf 1: %#x %#x %#x %#x\n", leaf.a, leaf.b, leaf.c, leaf.d); in x86_fpu_early_init()
167 LTRACEF("xsave leaf %d: %#x %#x %#x %#x\n", i, leaf.a, leaf.b, leaf.c, leaf.d); in x86_fpu_early_init()
168 LTRACEF("\tstate %d: size required %u offset %u\n", i, leaf.a, leaf.b); in x86_fpu_early_init()
196 dprintf(SPEW, "\txsave leaf 0: %#x %#x %#x %#x\n", leaf.a, leaf.b, leaf.c, leaf.d); in x86_fpu_init()
199 dprintf(SPEW, "\txsave leaf 1: %#x %#x %#x %#x\n", leaf.a, leaf.b, leaf.c, leaf.d); in x86_fpu_init()
205 … dprintf(SPEW, "\txsave leaf %d: %#x %#x %#x %#x\n", i, leaf.a, leaf.b, leaf.c, leaf.d); in x86_fpu_init()
206 dprintf(SPEW, "\t\tstate %d: size required %u offset %u\n", i, leaf.a, leaf.b); in x86_fpu_init()
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| /arch/arm64/ |
| A D | start.S | 287 b.hi .
288 b.lo 1f
396 b .
435 b .-4
439 b .-4
443 b .-4
447 b .-4
455 b .-4
459 b .-4
463 b .-4
[all …]
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| A D | spinlock.S | 27 cbnz x2, 1b
29 cbnz w2, 1b
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| A D | exceptions.S | 107 b .
119 b arm64_exc_shared_restore_short
146 b arm64_exc_shared_restore_long
157 b arm64_exc_shared_restore_short
169 b arm64_exc_shared_restore_long
180 b arm64_exc_shared_restore_short
192 b arm64_exc_shared_restore_long
203 b arm64_exc_shared_restore_short
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| A D | asm.S | 73 b .confEL1
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| /arch/arm/arm/ |
| A D | start.S | 20 b arm_undefined
21 b arm_syscall
24 b arm_reserved
25 b arm_irq
26 b arm_fiq
28 b arm_reset
130 bne 0b
176 bne 0b
200 blt 1b
272 b .
[all …]
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| A D | cache-ops.S | 110 b .Ldcache_disable_L2
302 blo 0b
313 b pl310_clean_range
328 blo 0b
339 b pl310_clean_invalidate_range
354 blo 0b
365 b pl310_invalidate_range
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| A D | ops.S | 30 bne 1b
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| A D | exceptions.S | 194 b .
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| /arch/arm64/include/arch/arm64/ |
| A D | cache_loop.h | 29 b.lt .Lskip_\name // no data or unified cache at this level
49 b.ge .Lloop3_\name
52 b.ge .Lloop2_\name
57 b.gt .Lloop1_\name
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| /arch/mips/ |
| A D | start.S | 21 bne $t0, $t1, 0b
31 b .
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| A D | vectors.S | 15 b .
96 b shared_irq_save_return
104 b shared_irq_save_return
105 b .
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| /arch/x86/64/ |
| A D | start.S | 90 loop 2b
147 loop 0b /* dec ecx and loop while > 0 */
169 loop 0b
181 loop 0b
229 jmp 0b /* so jump back to halt to conserve power */
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| A D | spinlock.S | 20 jmp 0b
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| /arch/m68k/ |
| A D | start.S | 33 bne 0b
50 bne 0b
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| A D | linker.ld | 60 *(.gnu.linkonce.b.*)
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| /arch/x86/32/ |
| A D | spinlock.S | 22 jmp 0b
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| A D | start.S | 87 loop 2b
190 jmp 0b /* so jump back to halt to conserve power */
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| /arch/riscv/ |
| A D | start.S | 65 bne t1, t2, 0b
76 bne t0, t1, 0b
195 bnez t3, 0b
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| A D | linker-onesegment.ld | 79 *(.gnu.linkonce.b.*)
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| /arch/x86/include/arch/ |
| A D | x86.h | 453 static inline void cpuid(uint32_t leaf, uint32_t *a, uint32_t *b, uint32_t *c, uint32_t *d) { in cpuid() argument
456 : "=a"(*a), "=b"(*b), "=c"(*c), "=d"(*d) in cpuid()
460 static inline void cpuid_c(uint32_t leaf, uint32_t csel, uint32_t *a, uint32_t *b, uint32_t *c, uin… in cpuid_c() argument
463 : "=a"(*a), "=b"(*b), "=c"(*c), "=d"(*d) in cpuid_c()
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| /arch/arm64/include/arch/ |
| A D | asm_macros.h | 80 b.lo .Lcalloc_bootmem_aligned_clear_loop\@
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| /arch/or1k/ |
| A D | start.S | 367 l.bnf 2b
374 l.bnf 1b
390 l.bnf 0b
423 l.bnf 2b
426 l.j 1b
454 l.bf 1b
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| A D | linker.ld | 83 *(.gnu.linkonce.b.*)
|