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Searched refs:csr (Results 1 – 1 of 1) sorted by relevance

/arch/riscv/include/arch/
A Driscv.h142 #define riscv_csr_clear(csr, bits) \ argument
146 "csrc " __ASM_STR(csr) ", %0" \
151 #define riscv_csr_read_clear(csr, bits) \ argument
156 "csrrc %0, " __ASM_STR(csr) ", %1" \
163 #define riscv_csr_set(csr, bits) \ argument
167 "csrs " __ASM_STR(csr) ", %0" \
172 #define riscv_csr_read(csr) \ argument
176 "csrr %0, " __ASM_STR(csr) \
182 #define riscv_csr_write(csr, val) \ argument
186 "csrw " __ASM_STR(csr) ", %0" \

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