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Searched refs:sr (Results 1 – 6 of 6) sorted by relevance

/arch/or1k/include/arch/
A Darch_ops.h15 uint32_t sr = mfspr(OR1K_SPR_SYS_SR_ADDR); in arch_enable_ints() local
17 sr |= OR1K_SPR_SYS_SR_IEE_MASK | OR1K_SPR_SYS_SR_TEE_MASK; in arch_enable_ints()
18 mtspr(OR1K_SPR_SYS_SR_ADDR, sr); in arch_enable_ints()
22 uint32_t sr = mfspr(OR1K_SPR_SYS_SR_ADDR); in arch_disable_ints() local
24 sr &= ~(OR1K_SPR_SYS_SR_IEE_MASK | OR1K_SPR_SYS_SR_TEE_MASK); in arch_disable_ints()
25 mtspr(OR1K_SPR_SYS_SR_ADDR, sr); in arch_disable_ints()
29 uint32_t sr = mfspr(OR1K_SPR_SYS_SR_ADDR); in arch_ints_disabled() local
31 return !(sr & (OR1K_SPR_SYS_SR_IEE_MASK | OR1K_SPR_SYS_SR_TEE_MASK)); in arch_ints_disabled()
A Dor1k.h81 uint32_t sr; member
/arch/or1k/
A Dcache-ops.c53 uint32_t sr = mfspr(OR1K_SPR_SYS_SR_ADDR); in arch_disable_cache() local
56 sr &= ~OR1K_SPR_SYS_SR_ICE_MASK; in arch_disable_cache()
58 sr &= ~OR1K_SPR_SYS_SR_DCE_MASK; in arch_disable_cache()
60 mtspr(OR1K_SPR_SYS_SR_ADDR, sr); in arch_disable_cache()
64 uint32_t sr = mfspr(OR1K_SPR_SYS_SR_ADDR); in arch_enable_cache() local
67 sr |= OR1K_SPR_SYS_SR_ICE_MASK; in arch_enable_cache()
69 sr |= OR1K_SPR_SYS_SR_DCE_MASK; in arch_enable_cache()
71 mtspr(OR1K_SPR_SYS_SR_ADDR, sr); in arch_enable_cache()
A Dfaults.c33 frame->pc, frame->sr); in dump_fault_frame()
/arch/m68k/include/arch/
A Darch_ops.h26 uint16_t sr; in arch_ints_disabled() local
27 asm volatile("move %%sr, %0" : "=dm"(sr) :: "memory"); in arch_ints_disabled()
30 return (sr & M68K_SR_IPM_MASK); in arch_ints_disabled()
/arch/m68k/
A Dexceptions.c20 uint16_t sr; member
28 …("pc 0x%08x sr 0x%04x format %#x vector %#x\n", iframe->pc_low | iframe->pc_high << 16, iframe->sr, in dump_iframe()

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