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Searched refs:scu_control_base (Results 1 – 2 of 2) sorted by relevance

/dev/timer/arm_cortex_a9/include/dev/timer/
A Darm_cortex_a9.h12 void arm_cortex_a9_timer_init(addr_t scu_control_base, uint32_t freq);
/dev/timer/arm_cortex_a9/
A Darm_cortex_a9_timer.c36 #define TIMREG(reg) (*REG32(scu_control_base + PRIV_TIMER_OFFSET + (reg)))
47 #define GTIMREG(reg) (*REG32(scu_control_base + GLOBAL_TIMER_OFFSET + (reg)))
58 static addr_t scu_control_base; variable
170 scu_control_base = _scu_control_base; in arm_cortex_a9_timer_init()

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